riscv/rocket-chip
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Properly ignore target files

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Stephen Twigg 2013-09-24 16:02:00 -07:00
parent c9813603ee
commit 20246b373e
1 changed files with 2 additions and 0 deletions
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uncore/.gitignore vendored Normal file
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@ -0,0 +1,2 @@
target/
project/target/