Commit Graph
22 Commits
Author SHA1 Message Date
Andrew Waterman 2d6b3b2331 Don't use clone 2015-07-15 18:06:27 -07:00
Andrew Waterman 276f53b652 Delete BigMem; it's not used anymore 2015-07-15 17:41:47 -07:00
Andrew Waterman 15cec0eab7 Vec(Reg) -> Reg(Vec) 2015-07-15 12:44:54 -07:00
Andrew Waterman e76a9d3493 Chisel3: Don't mix Mux types 2015-07-11 14:05:39 -07:00
Andrew Waterman 5dc3da008e Use Chisel3 SeqMem construct 2015-07-11 13:36:26 -07:00
Andrew Waterman 55059632c4 Temporarily use HTIF to push RTC value to cores 2015-07-05 16:19:39 -07:00
Andrew Waterman b4e38192a1 Fix (?) L2$ miss bug
The victim's metadata was incorrectly used for the new line.
2015-06-24 18:01:56 -07:00
Andrew Waterman ea76800d1a Fix data array reset bug
io.resp.valid could have been valid the cycle after reset, causing the
write mask in the acquire tracker to have an erroneous value after reset.
This caused the L1 I$ to be refilled with the wrong data.

This probably only affects programs loaded with +loadmem and so shouldn't
matter for the EOS24 silicon.  It should only affect the first L2 xact,
which, in practice, would be an HTIF write to load the program.
2015-06-11 15:28:23 -07:00
Andrew Waterman c941f0a68e New virtual memory implementation (Sv39) 2015-03-27 16:21:29 -07:00
Andrew Waterman 6e540825b2 Use entire 12-bit CSR address 2015-03-14 02:15:24 -07:00
Andrew Waterman d04da83f96 Make data RAMs 1RW instead of 1R1W 2014-12-15 17:36:17 -08:00
Andrew Waterman 9bf10ae5d2 remove extraneous toBits (need new Chisel) 2013-09-19 15:26:36 -07:00
Andrew Waterman cc7783404d Add memory command M_XA_XOR 2013-09-12 16:09:53 -07:00
Andrew Waterman 0672773c1a for now, don't use asserts outside of components 2013-05-09 02:14:44 -07:00
Andrew Waterman 7ff5b5b86f treat load-reserved as a non-dirtying store 2013-04-07 19:25:26 -07:00
Andrew Waterman 3479f1c6cd add LR/SC support 2013-04-07 19:25:20 -07:00
Andrew Waterman 944f56a766 remove duplicate definitions 2013-02-28 14:55:19 -08:00
Andrew Waterman 1945fa898b make external clock divider programmable 2013-01-24 23:40:47 -08:00
Andrew Waterman 62a3ea4113 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman 0aa33bf909 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman 1ebfeeca8a add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
Andrew Waterman 66cf690261 add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00