ea76800d1ae15e2f2fc1e388670f5808c38946dc
io.resp.valid could have been valid the cycle after reset, causing the write mask in the acquire tracker to have an erroneous value after reset. This caused the L1 I$ to be refilled with the wrong data. This probably only affects programs loaded with +loadmem and so shouldn't matter for the EOS24 silicon. It should only affect the first L2 xact, which, in practice, would be an HTIF write to load the program.
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