riscv/rocket-chip
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Author SHA1 Message Date
Wesley W. Terpstra 2acff8d21f util: delete old long-deprecated crossing code 2017-10-26 13:58:52 -07:00
Wesley W. Terpstra da7703aee9 crossings: deprecate non-island crossing style 2017-10-26 13:58:52 -07:00
Wesley W. Terpstra 76df1397e0 crossings: stop using deprecated APIs in tests 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra 380cc6f03b axi4: now also supports the island pattern 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra 05d48d1807 TLBuffer: replace TLBufferChain with TLBuffer.chain 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra ce2b904b19 coreplex: tidy up interrupt crossings 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra e30906589f coreplex: refactor crossings to use node pattern 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra 6276ea4291 diplomacy: it possible for NodeHandles to put indirection on their attachment 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra 8c5e8dd071 coreplex: leverage improved := composition 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra e894d64bca diplomacy: support := composition 
This makes it possible to treat chained composition associatively.
x := y :=? z :=* a ...

It also makes it easy to chain multiple optional adapters:
node :=? (Seq(a, b) ++ c ++ d)
 2017-10-26 13:04:32 -07:00
Wesley W. Terpstra 2175758050 interrupts: implement in crossing wrapper 2017-10-26 13:04:29 -07:00
Wesley W. Terpstra c6f95570df IntNodes: moved from tilelink to their own package 2017-10-25 16:56:51 -07:00
Wesley W. Terpstra 6bc9c9fc6c coreplex: add a crossing wrapper to generalize the island pattern 2017-10-25 16:56:50 -07:00
Wesley W. Terpstra 7453186b59 diplomacy: add reflection for parent modules to nodes 2017-10-25 16:56:50 -07:00
Wesley W. Terpstra 82b1aa8116 coreplex: print the A first to look nicer 2017-10-18 16:52:35 -07:00
Wesley W. Terpstra a1ac23d7ec coreplex: continue to print the device name in the address map 2017-10-18 16:44:53 -07:00
Wesley W. TerpstraandGitHub 8b58327fa4 axi4: conversion from TL does not need beatBytes (#1051) 
We used to pack the addr_lo into user bits. We don't do that anymore.
There is thus no need to waste those bits, nor to pass that arg.
 2017-10-12 16:41:54 -07:00
Wesley W. TerpstraandGitHub f82e441426 axi4: implement a diplomatic AXI4 clock crossing (#1049) 2017-10-12 00:05:45 -07:00
Wesley W. TerpstraandGitHub b566ffedea system: fix DefaultFPGAConfig (#1047) 
It was missing cores. Fixes #736.
 2017-10-11 10:48:41 -07:00
Wesley W. TerpstraandGitHub 8e1a002c4e Merge pull request #1033 from freechipsproject/dont-touch 
Use chisel3.experimental.dontTouch (take 2)
 2017-10-11 00:59:37 -07:00
Wesley W. Terpstra 6f3a4cd733 build: pass annotations to firrtl 2017-10-10 23:42:55 -07:00
Wesley W. Terpstra 5d62c321f4 generator: create annotation file 2017-10-10 23:23:06 -07:00
Wesley W. TerpstraandGitHub 5ff4c1674a Merge pull request #1044 from freechipsproject/nicer-clint 
clint: use RegField.toBytes to save some work
 2017-10-10 20:33:00 -07:00
Wesley W. Terpstra b3bdf5eca6 RegField: default argument for .bytes 2017-10-10 19:49:35 -07:00
Wesley W. Terpstra e094b94ce5 clint: use RegField.toBytes to save some work 2017-10-10 19:49:35 -07:00
Wesley W. TerpstraandGitHub 10472b4296 diplomacy: auto connect bundles in a stable order (#1045) 2017-10-10 19:41:46 -07:00
Wesley W. TerpstraandGitHub d6766a8c68 RocketTile: make sure 'hartid' is available for traits (#1037) 2017-10-09 21:03:18 -07:00
Wesley W. TerpstraandGitHub bd045a3b95 tilelink: split Acquire into Acquire{Block,Perm} (#1030) 
We had planned for a while to add an 'Overwrite' message which obtains
permissions without requiring retrieval of data. This is useful whenever
a master knows it will completely replace the contents of a cache block.

Instead of calling it Overwrite, we decided to split the Acquire type.

If you AcquirePerm, you MUST Release and ProbeAck with Data.
 2017-10-05 12:49:49 -07:00
Wesley W. TerpstraandGitHub a2dc13669a Error grants (#1025) 
* CacheCork: an error Grant still says 'toT' even though it is transient

Grants with errors must be handled by a client as though no actual
permissions were obtained, so that two clients do not both end up believing
that they own a block which is only temporarily offline. However, the
Grant MESSAGE should still match the request; ie. if you did Acquire.NtoT,
the response must be Grant.toT, even though the 'error' bit signals that
the Grant actually grants no permissions.

This keeps the implementation of request-response tracking in interstitial
adapters and FSMs simple, consistent with the way multibeat errors must
include all their beats.

* Error: handle permissions properly
 2017-10-02 14:49:25 -07:00
Wesley W. TerpstraandGitHub e315a7aaa7 Merge pull request #993 from freechipsproject/auto-diplomacy-bundles 
Auto diplomacy bundles
 2017-09-27 17:39:53 -07:00
Wesley W. Terpstra 0a287df0f7 Merge remote-tracking branch 'origin/master' into auto-diplomacy-bundles 2017-09-27 16:28:10 -07:00
Wesley W. Terpstra feae216f05 clint: output interrupts in the correct direction 2017-09-27 15:18:42 -07:00
Wesley W. Terpstra 9307092d14 coreplex: draw the FrontBus at the bottom and SystemBus at the top 2017-09-27 14:20:39 -07:00
Wesley W. Terpstra e07d86aecd rocket: flip interrupt rendering so cores are on top 2017-09-27 12:46:29 -07:00
Wesley W. TerpstraandHenry Cook 1fda05970a rocket: move interrupt synchronizers to correct side of crossing 2017-09-27 12:33:08 -07:00
Wesley W. Terpstra ce01ab2700 RegisterRouter: correctly create interrupts vector 2017-09-27 12:27:16 -07:00
Wesley W. Terpstra 0268959c24 rocket: move interrupt synchronizers to correct side of crossing 2017-09-27 12:02:04 -07:00
Wesley W. Terpstra e35d3df6ea diplomacy: detect and report cycles in the diplomatic graph 2017-09-27 11:46:06 -07:00
Wesley W. Terpstra 5af08966d8 coreplex: fix WithoutTLMonitors 
closes #1017
 2017-09-27 00:57:18 -07:00
Wesley W. Terpstra d87536ff8b diplomacy: make NodeHandle recursively composable 2017-09-26 18:47:16 -07:00
Wesley W. Terpstra 31a934bec0 coreplex: buses are now LazyModules with LazyScope 2017-09-26 14:58:56 -07:00
Wesley W. Terpstra da40573a64 diplomacy: replace LazyModule.stack with an optional scope 2017-09-26 14:56:50 -07:00
Wesley W. Terpstra a2b423d647 diplomacy: add LazyScope to post-hoc add children to a LazyModule 2017-09-26 14:40:45 -07:00
Wesley W. Terpstra a27e853101 diplomacy: move rendering properties to edges 
FlipRendering { implicit p => ... } now changes the render direction of edges.
diplomatic NodeImps can specify a default render flip using the new 'render' method.
 2017-09-26 13:24:36 -07:00
Wesley W. Terpstra 76c2aa1661 diplomacy: introduce the typing-saving SimpleNodeImp 2017-09-26 12:28:59 -07:00
Wesley W. Terpstra 870ed3d219 diplomacy: fix the order of auto signals 2017-09-26 11:56:55 -07:00
Wesley W. Terpstra d22ec1eddf diplomacy: beautify node signal prefixes 2017-09-26 11:56:53 -07:00
Wesley W. Terpstra 0111213bea ValName: trim whitespace from symbol names 2017-09-25 17:47:40 -07:00
Wesley W. Terpstra fef5054cec diplomacy: disambiguate names only when necessary 
If two (or more) 'auto_' things have the same name, append _0 and _1 to them.

The order of definitions is unaffected; ie:
  a => a_0
  b => b_0
  b => b_1
  c => c
  a => a_1
 2017-09-25 16:12:34 -07:00
Wesley W. Terpstra 5323cf88dd util: add Option.unzip 2017-09-25 12:06:31 -07:00
Wesley W. Terpstra 60614055e3 diplomacy: eliminate some wasted IdentityNodes using cross-module refs 2017-09-25 12:06:27 -07:00
Wesley W. Terpstra bc225a4e82 diplomacy: place Monitors inside LazyModules sinks 
We used to place Monitors at the point of the ':='.
This was problematic because the clock domain might be wrong.
Thus, we needed to shove Monitors a lot.

Furthermore, now that we have cross-module ':=', you might not even
have access to the wires at the point where ':=' is invoked.
 2017-09-22 23:36:17 -07:00
Wesley W. Terpstra cfb7f13408 diplomacy: capture SourceInfo at point of := in Edge parameters 2017-09-22 22:25:56 -07:00
Wesley W. Terpstra 16969eb1f6 diplomacy: spelling fix 2017-09-22 15:01:42 -07:00
Wesley W. Terpstra b9a2e4c243 diplomacy: API beautification 2017-09-22 15:01:42 -07:00
Wesley W. Terpstra 9217baf9d4 diplomacy: change API to auto-create node bundles => cross-module refs 2017-09-22 15:01:39 -07:00
Wesley W. Terpstra 53f6999ea8 Splitter: reuse TLCustom node instead of special diplomacy case 2017-09-22 14:58:39 -07:00
Wesley W. Terpstra 6fa5250e1f config: fix warning 2017-09-22 14:58:36 -07:00
Wesley W. Terpstra 17ba209ed0 coreplex: name LazyModules 2017-09-22 14:38:47 -07:00
Wesley W. Terpstra 1fedabcb55 tilelink: invoke LazyModule() at point of monitor binding 2017-09-22 14:38:47 -07:00
Wesley W. Terpstra dfc815f4d3 rocket: invoke LazyModule at point of use/binding 2017-09-22 14:38:47 -07:00
Wesley W. Terpstra 87d597c70d ahb apb: remove unintentional var 2017-09-22 14:38:47 -07:00
Wesley W. Terpstra d89ee9d9d4 nodes: grab a name on construction 2017-09-22 14:38:47 -07:00
Wesley W. Terpstra 3656e975a1 diplomacy: ValName captures val bindings for Nodes 2017-09-22 14:38:47 -07:00
Wesley W. TerpstraandGitHub e7de7f3e82 Merge pull request #985 from freechipsproject/flop-interrupts 
Add Parameters to diplomatic edges
 2017-09-08 13:16:11 -07:00
Wesley W. Terpstra e723a3f42b MemoryBus: fanout the A for performance 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 6879f5bfb1 tilelink: Xbar now allows for fanout control 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra e831acba9c adapters: support bulk connections 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 06a244f9f9 diplomacy: rename {Left,Right}Star to refer to {Source,Sink}Cardinality 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra bef593c21a diplomacy: edges now capture their Parameters 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 80ed27683e diplomacy: protect against API leakage 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 1365c5f90c diplomacy: implement DisableMonitors scope 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra a450357744 tilelink: Monitor construction method is unconditional 
Whether or not a Monitor should be placed is decided by diplomacy.
 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 7a8364ef08 diplomacy: leverage new Parameters defaults 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 655a08f12e config: support default values for Field[T] keys 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 09d8d476c5 config: require Parameters keys to be Field[T] 
This has been good practice for ages. Enforce it.
 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 42f1ae27fc Xbar: use the IdentityModule to encourage wider fanout 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 5626cdd18f util: add the IdentityModule, useful to dedup wires 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 1a87ed1193 coreplex: add externalSlaveBuffers configuration option 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra fd8a51a910 coreplex: rename externalBuffers to externalMasterBuffers 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 4911a7d44f tilelink Bus: toAsyncSlaves now supports BufferChains 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 040f7e1d49 tilelink: add Bus.toSyncSlaves for easy BufferChain attachment 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra d5c6494f59 tilelink: Bus.toRationalSlaves can have a BufferChain 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 80965e8230 tilelink Buffer: use new :=? adapter API 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 1b705f62f6 diplomacy: support :=? for unknown star inference 2017-09-07 16:03:35 -07:00
Wesley W. Terpstra 6bfea86dbf config: support p.lift(key) to optionally return a value 2017-09-07 16:03:34 -07:00
Wesley W. Terpstra 2d93262f71 RationalCrossing: use ShiftQueues 
These are faster and small don't cost much more.
 2017-09-07 16:03:34 -07:00
Wesley W. Terpstra 50d5d8c1fd ShiftQueue: added a helper object 2017-09-07 16:03:34 -07:00
Wesley W. Terpstra 3e3024c256 ShiftQueue: fix bug in !flow case 2017-09-07 16:03:34 -07:00
Wesley W. Terpstra ed70b243bd plic: support a configurable number of interrupt register stages 2017-09-07 16:03:34 -07:00
Wesley W. Terpstra 9b55063de6 clint: support a configurable number of interrupt register stages 2017-09-07 16:03:34 -07:00
Wesley W. TerpstraandGitHub 55a0df4186 Merge pull request #982 from freechipsproject/frontbus3 
Add a FrontBus to which low-bandwidth bus masters attach
 2017-09-06 02:38:55 +02:00
Wesley W. Terpstra b1cacc56ad SystemBus: restore correct order of FIFOFixer and Buffer 2017-09-05 16:41:39 -07:00
Wesley W. Terpstra b74a419bfb FrontBus: FIFOFixer should not have a buffer between it and Xbar 2017-09-05 16:27:57 -07:00
Wesley W. Terpstra e65f49b89a FrontBus: attach to splitter for cross-chip visibility 2017-09-05 15:03:41 -07:00
Wesley W. Terpstra 5886025b1a sbus => pbus: 2 buffers should already be enough 
There is a buffer on the sbus backside.
There is a buffer on the pbus frontside.

Between them is only an AtomicAutomata.
That should be enough for most designs.
 2017-09-05 15:03:38 -07:00
Wesley W. Terpstra d5b62dffda SystemBus: add stupidly many (4 more) buffers from sbus=>pbus 
This should probably be reverted.
 2017-08-30 14:22:49 -07:00
Wesley W. TerpstraandGitHub 173f185b17 Merge pull request #976 from freechipsproject/system-buffer 
SystemBus: add output buffering
 2017-08-30 23:22:13 +02:00
Wesley W. Terpstra 656609d610 SystemBus: split FIFOFixers along bus boundaries 
If you have a system with a lot of periphery slaves, you wan to FIFO fix
them on the periphery bus rather than paying the circuit cost at the sbus.
 2017-08-30 13:28:11 -07:00
Wesley W. Terpstra bf19440db5 SystemBus: use a full buffer on slaves 2017-08-26 02:47:04 -07:00