util: delete old long-deprecated crossing code
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@ -19,118 +19,3 @@ class CrossingIO[T <: Data](gen: T) extends Bundle {
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abstract class Crossing[T <: Data] extends Module {
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val io: CrossingIO[T]
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}
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class AsyncScope extends Module { val io = new Bundle }
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object AsyncScope { def apply() = Module(new AsyncScope) }
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object AsyncDecoupledCrossing
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{
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// takes from_source from the 'from' clock domain and puts it into the 'to' clock domain
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def apply[T <: Data](from_clock: Clock, from_reset: Bool, from_source: ReadyValidIO[T], to_clock: Clock, to_reset: Bool, depth: Int = 8, sync: Int = 3): DecoupledIO[T] = {
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val crossing = Module(new AsyncQueue(from_source.bits, depth, sync)).io
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crossing.enq_clock := from_clock
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crossing.enq_reset := from_reset
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crossing.enq <> from_source
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crossing.deq_clock := to_clock
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crossing.deq_reset := to_reset
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crossing.deq
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}
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}
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object AsyncDecoupledTo
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{
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// takes source from your clock domain and puts it into the 'to' clock domain
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def apply[T <: Data](to_clock: Clock, to_reset: Bool, source: ReadyValidIO[T], depth: Int = 8, sync: Int = 3): DecoupledIO[T] = {
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val scope = AsyncScope()
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AsyncDecoupledCrossing(scope.clock, scope.reset, source, to_clock, to_reset, depth, sync)
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}
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}
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object AsyncDecoupledFrom
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{
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// takes from_source from the 'from' clock domain and puts it into your clock domain
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def apply[T <: Data](from_clock: Clock, from_reset: Bool, from_source: ReadyValidIO[T], depth: Int = 8, sync: Int = 3): DecoupledIO[T] = {
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val scope = AsyncScope()
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AsyncDecoupledCrossing(from_clock, from_reset, from_source, scope.clock, scope.reset, depth, sync)
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}
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}
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object PostQueueIrrevocablize
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{
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def apply[T <: Data](deq: DecoupledIO[T]): IrrevocableIO[T] = {
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val irr = Wire(new IrrevocableIO(deq.bits))
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irr.bits := deq.bits
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irr.valid := deq.valid
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deq.ready := irr.ready
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irr
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}
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}
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object AsyncIrrevocableCrossing {
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def apply[T <: Data](from_clock: Clock, from_reset: Bool, from_source: ReadyValidIO[T], to_clock: Clock, to_reset: Bool, depth: Int = 8, sync: Int = 3): IrrevocableIO[T] = {
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PostQueueIrrevocablize(AsyncDecoupledCrossing(from_clock, from_reset, from_source, to_clock, to_reset, depth, sync))
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}
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}
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object AsyncIrrevocableTo
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{
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// takes source from your clock domain and puts it into the 'to' clock domain
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def apply[T <: Data](to_clock: Clock, to_reset: Bool, source: ReadyValidIO[T], depth: Int = 8, sync: Int = 3): IrrevocableIO[T] = {
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PostQueueIrrevocablize(AsyncDecoupledTo(to_clock, to_reset, source, depth, sync))
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}
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}
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object AsyncIrrevocableFrom
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{
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// takes from_source from the 'from' clock domain and puts it into your clock domain
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def apply[T <: Data](from_clock: Clock, from_reset: Bool, from_source: ReadyValidIO[T], depth: Int = 8, sync: Int = 3): IrrevocableIO[T] = {
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PostQueueIrrevocablize(AsyncDecoupledFrom(from_clock, from_reset, from_source, depth, sync))
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}
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}
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/**
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* This helper object synchronizes a level-sensitive signal from one
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* clock domain to another.
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*/
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object LevelSyncCrossing {
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class SynchronizerBackend(sync: Int, _clock: Clock) extends Module(Some(_clock)) {
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val io = new Bundle {
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val in = Bool(INPUT)
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val out = Bool(OUTPUT)
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}
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io.out := SynchronizerShiftReg(io.in, sync)
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}
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class SynchronizerFrontend(_clock: Clock) extends Module(Some(_clock)) {
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val io = new Bundle {
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val in = Bool(INPUT)
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val out = Bool(OUTPUT)
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}
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io.out := RegNext(io.in)
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}
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def apply(from_clock: Clock, to_clock: Clock, in: Bool, sync: Int = 2): Bool = {
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val front = Module(new SynchronizerFrontend(from_clock))
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val back = Module(new SynchronizerBackend(sync, to_clock))
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front.io.in := in
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back.io.in := front.io.out
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back.io.out
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}
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}
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object LevelSyncTo {
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def apply(to_clock: Clock, in: Bool, sync: Int = 2): Bool = {
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val scope = AsyncScope()
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LevelSyncCrossing(scope.clock, to_clock, in, sync)
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}
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}
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object LevelSyncFrom {
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def apply(from_clock: Clock, in: Bool, sync: Int = 2): Bool = {
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val scope = AsyncScope()
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LevelSyncCrossing(from_clock, scope.clock, in, sync)
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}
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}
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