Stephen Twigg
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bd43ca8423
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Merge branch 'master' of github.com:ucb-bar/reference-chip
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2013-05-23 17:51:24 -07:00 |
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Henry Cook
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c06cbf523b
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Redo network to use PairedData crossbars when necessary. Hard-coded network types for each message type. Bump chisel, rocket, uncore.
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2013-05-23 15:26:20 -07:00 |
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Henry Cook
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6a69d7d7b5
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pass closure to generate bank addr
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2013-05-23 14:58:19 -07:00 |
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Henry Cook
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9631b6081e
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Merge branch 'tilelink-data'
Conflicts:
src/package.scala
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2013-05-23 14:53:10 -07:00 |
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Henry Cook
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cf02f1ef01
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use new locking round robin arbiter
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2013-05-23 14:16:50 -07:00 |
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Henry Cook
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569d8fd796
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Merge branch 'tilelink-data'
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2013-05-23 14:14:40 -07:00 |
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Henry Cook
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12205b9684
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remove obsolete config file reader prototype
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2013-05-23 14:09:03 -07:00 |
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Andrew Waterman
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fe9adfe71b
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Simplify and correct integer multiplier
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2013-05-22 17:27:50 -07:00 |
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Yunsup Lee
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26ed805862
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push chisel,riscv-rocket,uncore
linux kernel boots!
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2013-05-21 19:00:40 -07:00 |
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Yunsup Lee
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11133d6d4c
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clock gate s2 registers in the frontend
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2013-05-21 18:59:21 -07:00 |
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Yunsup Lee
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c837c1d800
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fix bug in previous JALR commit
on commit tag 9a122c06d1bf11237d7fb0769d454a67bbb7400e
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2013-05-21 18:28:44 -07:00 |
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Henry Cook
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69b508ff39
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ported caches and htif to use new tilelink
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2013-05-21 17:21:04 -07:00 |
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Henry Cook
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4c1f105ce9
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added PairedData link type with matching crossbar, ported tilelink and uncore to use
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2013-05-21 17:19:07 -07:00 |
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Andrew Waterman
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28f914c3f2
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don't JALR to speculatively-bypassed addresses
Technically not necessary, but probably improves performance.
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2013-05-21 16:56:58 -07:00 |
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Yunsup Lee
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dcde377303
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Fix DM I$ deadlock
BTB predictions were causing infinite miss loops
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2013-05-20 15:22:58 -07:00 |
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Andrew Waterman
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3a1b5f01b2
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don't take interrupts while they're disabled!
a control bug allowed an interrupt to be taken on the instruction immediately
following an interrupt-disabling instruction (but not thereafter).
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2013-05-19 23:27:47 -07:00 |
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Andrew Waterman
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6eb4c2542a
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comment out I$ assert for now
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2013-05-18 18:09:23 -07:00 |
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Andrew Waterman
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1dab984231
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use UFix instead of Bits for arithmetic
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2013-05-18 00:45:29 -07:00 |
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Andrew Waterman
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dfa7a03f73
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use assert, not Assert
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2013-05-18 00:45:13 -07:00 |
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Yunsup Lee
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f3c78abc2b
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push riscv-tests
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2013-05-16 00:51:02 -07:00 |
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Yunsup Lee
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e77bde71d0
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push riscv-tools
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2013-05-15 12:03:52 -07:00 |
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Yunsup Lee
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f0b0867f5a
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push riscv-tests
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2013-05-13 19:22:28 -07:00 |
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Yunsup Lee
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f13605d2f5
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push riscv-tools
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2013-05-13 19:14:57 -07:00 |
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Yunsup Lee
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7ba3ab03e2
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update README
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2013-05-13 11:19:55 -07:00 |
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Yunsup Lee
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5b55cc93af
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add submodule riscv-tools
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2013-05-10 11:53:55 -07:00 |
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Andrew Waterman
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0672773c1a
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for now, don't use asserts outside of components
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2013-05-09 02:14:44 -07:00 |
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Andrew Waterman
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e8fcdb56a6
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update chisel to work around xilinx ise bug
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2013-05-03 01:47:15 -07:00 |
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Andrew Waterman
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d825c9d6e9
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make fpga Makefile work with updated Makefrag
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2013-05-02 05:09:45 -07:00 |
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Andrew Waterman
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cfa86dba4f
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add FPGA test bench
The memory models now support back pressure on the response.
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2013-05-02 04:59:32 -07:00 |
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Andrew Waterman
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d2e1828714
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gracefully kill htif thread, fixing tty stuff
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2013-05-02 04:59:32 -07:00 |
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Andrew Waterman
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d405ffa949
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assume all I$ grants bear data
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2013-05-01 21:01:20 -07:00 |
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Henry Cook
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9a3b2e7006
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new paired meta/data IO type, and matching arbiter
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2013-05-01 17:18:12 -07:00 |
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Andrew Waterman
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474d321cc7
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fix meta hazard counter to reset on new meta writes
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2013-05-01 16:35:24 -07:00 |
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Andrew Waterman
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a6a88fce19
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Revert "broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle"
This reverts commit b41e6bc50519631ba097ac1196737be7107295f9.
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2013-05-01 16:34:45 -07:00 |
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Andrew Waterman
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63a38e7982
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Revert "temp"
This reverts commit 73705e6ed8f98d08ce6b30fbe760de694c6563ae.
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2013-05-01 16:34:33 -07:00 |
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Henry Cook
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b6945408cb
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temp
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2013-05-01 10:24:36 -07:00 |
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Henry Cook
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722bc917d3
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broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle
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2013-05-01 10:05:54 -07:00 |
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Yunsup Lee
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a86ad08c1e
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commit awesome vlsi/energy scripts
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2013-05-01 02:59:11 -07:00 |
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Andrew Waterman
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50bd9a08a7
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resynchronize fpga uncore
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2013-05-01 01:12:47 -07:00 |
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Henry Cook
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9a258e7fb4
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use new locking round robin arbiter
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2013-04-30 17:10:06 -07:00 |
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Henry Cook
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fedc2753e4
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make sure master_xact_id field is large enough for temporary extra release trackers
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2013-04-30 11:03:34 -07:00 |
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Andrew Waterman
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1501e90c1f
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interlock probe unit on tag RAW hazards
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2013-04-30 00:38:22 -07:00 |
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Yunsup Lee
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a2f584e928
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add riscv-tests, get rid of riscv-asmtests-bmarks
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2013-04-29 19:29:51 -07:00 |
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Henry Cook
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12d394811e
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Allow release data to be written out even before all releases have been collected
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2013-04-29 18:48:31 -07:00 |
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Henry Cook
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e8b20f3d38
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clear meta state of silently-dropped, clean evictee, so as to prevent a write race on meta array between probes on evictee and refill grant
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2013-04-25 17:41:04 -07:00 |
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Yunsup Lee
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7fe052e1bf
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update README
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2013-04-24 02:05:28 -07:00 |
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Yunsup Lee
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9114012def
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assmebly tests are now built from riscv-tests
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2013-04-24 01:59:14 -07:00 |
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Yunsup Lee
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93df795e48
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change LLC leaf SRAM size
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2013-04-22 11:06:50 -07:00 |
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Andrew Waterman
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7f5282d355
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replace RDNPC with AUIPC
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2013-04-22 04:21:46 -07:00 |
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Andrew Waterman
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50ccc20bf3
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replace RDNPC with AUIPC
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2013-04-22 04:20:15 -07:00 |
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