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Commit Graph

275 Commits

Author SHA1 Message Date
c531093898 Fix bug introduced with Fuzzer when nOperations is power of 2 (#492) 2016-12-15 19:10:53 -08:00
a9b264e582 ahb: lower hsel when idle to save power 2016-12-15 15:32:30 -08:00
16febe7e94 apb: add a TileLink to APB bridge and unittest it 2016-12-15 15:32:27 -08:00
a5b8fc2317 RegisterRouterTest: start up with 0 in registers to make VIP testing easier 2016-12-14 15:38:08 -08:00
aae9b23036 Update with paratermized LazyModule 2016-12-12 16:16:56 -08:00
762afcd54a Merge remote-tracking branch 'origin/master' into jchang_test 2016-12-09 16:56:49 -08:00
4c3083c181 Remove unnecessary val 2016-12-09 16:44:30 -08:00
51dfb9cb06 ahb: TileLink master 2016-12-08 18:00:39 -08:00
54cc071a64 Fix Fragmenter to ensure logical operations must be sent out atomically.
Edited Fuzzer so that it can generate infinite operations when nOperations is net to 0
2016-12-07 16:22:05 -08:00
c2eedbfe23 tilelink2 Monitor: use Parameters instead of global variables 2016-12-07 12:24:03 -08:00
020fbe8be9 diplomacy: make config.Parameters available in bundle connect()
This makes it posisble to use Parameters to control Monitors.
However, we need to make all LazyModules carry Parameters.
2016-12-07 12:24:01 -08:00
fbfa15efea TLBroadcast: support non-FIFO devices (#482) 2016-12-05 22:10:37 -08:00
cff2612cdb minor Changes needed to support formal tests 2016-12-01 15:02:23 -08:00
b7963eca4e copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
30e890b480 diplomacy: include InternalNodes for AXI4 and TL 2016-11-23 20:44:45 -08:00
38c5af5bad [rocket] cleanup mshr logic 2016-11-23 12:09:56 -08:00
1d3cad3671 tilelink2 SourceShrinker: handle degenerate cases for free 2016-11-22 22:17:30 -08:00
c0b27999ea tilelink2 SourceShrinker: a concurrency reducing adapter 2016-11-22 21:43:38 -08:00
0097274ea3 Broadcast: single-cycle response is possible 2016-11-22 20:45:40 -08:00
c31b41a7ac [tl2] add grant finisher comment 2016-11-19 19:16:43 -08:00
8b908465e0 [tl2] convert NBDcache to TL2 (WIP; compiles but untested) 2016-11-18 19:04:06 -08:00
5f1cc19d71 [tl2] fix comment explaining permissions 2016-11-18 19:02:17 -08:00
10112da4e7 [tl2] won't need putthrough opcode 2016-11-18 19:02:17 -08:00
03bca77b33 tilelink2 Metadata: cannot assert data good when !valid 2016-11-18 17:16:12 -08:00
37a3c22639 rocketchip: move from using cde to config 2016-11-18 16:18:33 -08:00
94086f2270 [tl2] broadcast hub probe port width bugfix 2016-11-17 18:42:59 -08:00
960c2723ab [tl2] MemoryOpCategories: use def to supply Cat'd consts 2016-11-17 18:42:59 -08:00
dfc3a0dafb tilelink2: do not depend on obsolete TL1 configuration 2016-11-17 14:07:53 -08:00
24e3216fcf coreplex: allow zero interrupt sink/sources 2016-11-16 16:50:36 -08:00
479bc82f03 tilelink2 Broadcast: improve bufferless throughput 2016-11-16 16:50:36 -08:00
1f51564577 [rocket] dcache probe ack data bugfix 2016-11-16 14:25:21 -08:00
5d2e637a4a tilelink2 Legacy: uncached TL never needs manager_xact_id 2016-11-16 12:16:25 -08:00
10e459fedb rocket: change connection between rocketchip and coreplex
* rtc and dtm are now crossed half-and-half on the two sides
* groundtest no longer uses riscv platform traits
2016-11-15 18:27:52 -08:00
ab3dafb8bc Monitor: restore Probe&Acquire checks 2016-11-14 15:36:52 -08:00
c0efd247b0 [tl2] expand firstlast api and L1WB bugfix 2016-11-14 12:12:31 -08:00
b7730d66f2 WIP bugfixes: run until corrupted WB data (beats repeated) 2016-11-11 18:34:48 -08:00
afa1a6d549 WIP uncore and rocket changes compile 2016-11-10 15:57:29 -08:00
9d77e34bee tilelink2 Filter: make transfer cap robust against large filters 2016-11-04 13:35:36 -07:00
b8df59f43b tilelink2 Broadcast: support "bufferless" implementation 2016-11-04 13:35:36 -07:00
14800f8fb4 tilelink2 Broadcast: only support caching readable devices 2016-11-04 13:35:36 -07:00
0f3947bb86 tilelink2 Broadcast: add special case handling for 0 cached clients 2016-11-03 22:18:28 -07:00
ba3c83287f tilelink2 Xbar: merge the AddressSets of fractured managers 2016-11-03 22:18:28 -07:00
55326c29bb tilelink2: Filter adapter removes some of the address space 2016-11-03 22:18:23 -07:00
86ba94781b tilelink2: broadcast coherence manager 2016-11-03 14:37:19 -07:00
d067e87a7d tilelink2 Parameters: sinkId is per port, not per manager 2016-11-03 14:37:17 -07:00
ed4224dde4 tilelink2 AtomicAutomata: fix AccessAck on same cycle as PutFull
If we send out the PutFull portion of an AMO, the slave is allowed
to respond with AccessAck on the same cycle. In this case, we are
still in the AMO state, but must still match the D response.
2016-10-31 15:17:10 -07:00
ba529c3716 rocketchip: use TileLink2 interrupts 2016-10-31 11:42:47 -07:00
043ed48c8c tilelink2 HintHandler: delay answers to help TL1 legacy clients 2016-10-31 11:42:47 -07:00
015c3b862a diplomacy: print out bus widths on edges in agent graph 2016-10-31 11:42:47 -07:00
545154c1c3 groundtest: make it happy with TL2 addressing 2016-10-31 11:42:47 -07:00