Yunsup Lee
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f13605d2f5
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push riscv-tools
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2013-05-13 19:14:57 -07:00 |
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Yunsup Lee
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7ba3ab03e2
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update README
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2013-05-13 11:19:55 -07:00 |
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Yunsup Lee
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5b55cc93af
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add submodule riscv-tools
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2013-05-10 11:53:55 -07:00 |
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Andrew Waterman
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0672773c1a
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for now, don't use asserts outside of components
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2013-05-09 02:14:44 -07:00 |
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Andrew Waterman
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e8fcdb56a6
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update chisel to work around xilinx ise bug
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2013-05-03 01:47:15 -07:00 |
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Andrew Waterman
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d825c9d6e9
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make fpga Makefile work with updated Makefrag
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2013-05-02 05:09:45 -07:00 |
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Andrew Waterman
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cfa86dba4f
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add FPGA test bench
The memory models now support back pressure on the response.
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2013-05-02 04:59:32 -07:00 |
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Andrew Waterman
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d2e1828714
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gracefully kill htif thread, fixing tty stuff
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2013-05-02 04:59:32 -07:00 |
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Andrew Waterman
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d405ffa949
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assume all I$ grants bear data
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2013-05-01 21:01:20 -07:00 |
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Henry Cook
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9a3b2e7006
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new paired meta/data IO type, and matching arbiter
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2013-05-01 17:18:12 -07:00 |
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Andrew Waterman
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474d321cc7
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fix meta hazard counter to reset on new meta writes
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2013-05-01 16:35:24 -07:00 |
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Andrew Waterman
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a6a88fce19
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Revert "broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle"
This reverts commit b41e6bc50519631ba097ac1196737be7107295f9.
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2013-05-01 16:34:45 -07:00 |
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Andrew Waterman
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63a38e7982
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Revert "temp"
This reverts commit 73705e6ed8f98d08ce6b30fbe760de694c6563ae.
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2013-05-01 16:34:33 -07:00 |
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Henry Cook
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b6945408cb
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temp
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2013-05-01 10:24:36 -07:00 |
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Henry Cook
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722bc917d3
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broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle
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2013-05-01 10:05:54 -07:00 |
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Yunsup Lee
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a86ad08c1e
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commit awesome vlsi/energy scripts
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2013-05-01 02:59:11 -07:00 |
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Andrew Waterman
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50bd9a08a7
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resynchronize fpga uncore
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2013-05-01 01:12:47 -07:00 |
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Henry Cook
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9a258e7fb4
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use new locking round robin arbiter
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2013-04-30 17:10:06 -07:00 |
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Henry Cook
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fedc2753e4
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make sure master_xact_id field is large enough for temporary extra release trackers
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2013-04-30 11:03:34 -07:00 |
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Andrew Waterman
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1501e90c1f
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interlock probe unit on tag RAW hazards
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2013-04-30 00:38:22 -07:00 |
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Yunsup Lee
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a2f584e928
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add riscv-tests, get rid of riscv-asmtests-bmarks
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2013-04-29 19:29:51 -07:00 |
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Henry Cook
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12d394811e
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Allow release data to be written out even before all releases have been collected
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2013-04-29 18:48:31 -07:00 |
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Henry Cook
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e8b20f3d38
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clear meta state of silently-dropped, clean evictee, so as to prevent a write race on meta array between probes on evictee and refill grant
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2013-04-25 17:41:04 -07:00 |
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Yunsup Lee
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7fe052e1bf
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update README
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2013-04-24 02:05:28 -07:00 |
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Yunsup Lee
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9114012def
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assmebly tests are now built from riscv-tests
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2013-04-24 01:59:14 -07:00 |
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Yunsup Lee
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93df795e48
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change LLC leaf SRAM size
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2013-04-22 11:06:50 -07:00 |
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Andrew Waterman
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7f5282d355
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replace RDNPC with AUIPC
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2013-04-22 04:21:46 -07:00 |
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Andrew Waterman
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50ccc20bf3
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replace RDNPC with AUIPC
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2013-04-22 04:20:15 -07:00 |
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Huy Vo
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2ac3fd5306
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get rid of init_node
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2013-04-20 01:36:32 -07:00 |
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Huy Vo
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0d87e3bacc
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fixed init pin generation
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2013-04-20 00:38:01 -07:00 |
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Henry Cook
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a01cdf95fd
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tell physical networks carring cache lines to lock arbitration for REFILL_CYCLES pumps
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2013-04-10 13:53:27 -07:00 |
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Henry Cook
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db5a060c7d
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fix io dir
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2013-04-10 13:47:30 -07:00 |
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Henry Cook
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766d5622b1
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Prevent messages from becoming interleaved in the BasicCrossbar. Remove dependency trackers from the uncore, use msg headers instead. Have one ReleaseHnadler per core for now.
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2013-04-10 13:46:31 -07:00 |
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Henry Cook
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d7982bf27f
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bump uncore for grant fix
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2013-04-09 14:29:49 -07:00 |
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Henry Cook
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74187c2068
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Always route voluntary releases to ReleaseTracker to ensure all grants are sent
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2013-04-09 14:09:55 -07:00 |
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Andrew Waterman
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7ea782fd22
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add LR/SC
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2013-04-07 19:36:15 -07:00 |
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Andrew Waterman
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ae7720e284
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guarantee LR/SC forward progress
the mechanism is to block new probes for several cycles after a successful LR.
this also cleans up the MSHR <-> ProbeUnit interface slightly.
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2013-04-07 19:27:21 -07:00 |
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Andrew Waterman
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7ff5b5b86f
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treat load-reserved as a non-dirtying store
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2013-04-07 19:25:26 -07:00 |
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Andrew Waterman
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3479f1c6cd
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add LR/SC support
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2013-04-07 19:25:20 -07:00 |
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Andrew Waterman
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e74e032c87
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simplify MSHR memory response logic
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2013-04-06 01:03:37 -07:00 |
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Andrew Waterman
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1abb9277db
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fix LR/SC atomicity violation
note, it's still not starvation-free.
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2013-04-05 19:13:38 -07:00 |
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Andrew Waterman
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8cbdeb2abf
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add LR/SC support
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2013-04-04 17:07:09 -07:00 |
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Andrew Waterman
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fc46daecf6
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don't flush pipeline on writes to side-effect-free PCRs
notably, K0, K1, and EPC
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2013-04-04 17:07:09 -07:00 |
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Andrew Waterman
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8b439ef20d
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only support setpcr/clearpcr of SR
the full PCR RMW support was wasted area/power
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2013-04-04 17:07:08 -07:00 |
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Andrew Waterman
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d43f484feb
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take interrupts on nonzero fromhost values
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2013-04-04 17:07:08 -07:00 |
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Andrew Waterman
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d4a3351cfc
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expose pending interrupts in status register
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2013-04-04 17:07:08 -07:00 |
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Henry Cook
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c6b56c5f25
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bump rocket for coherence bug fix
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2013-04-04 15:52:20 -07:00 |
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Henry Cook
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f8aebcbf8c
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fix for cache controller bug: failing to mux correct metadata into mshr.io.old_meta on tag match
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2013-04-04 15:50:29 -07:00 |
|
Henry Cook
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9d5e97d89e
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override io in LogicalNetwork
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2013-03-28 14:10:20 -07:00 |
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Henry Cook
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b6cc08e8ca
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override io in LogicalNetwork
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2013-03-28 14:09:48 -07:00 |
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