Yunsup Lee
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763c57931b
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fix problem introduced with verilog generation in vsim/fsim
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2014-09-04 09:49:57 -07:00 |
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Scott Beamer
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6c6f5a3843
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add verilog target to build without simulator
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2014-09-03 17:28:45 -07:00 |
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Yunsup Lee
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c03c09ec31
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update for rocket-chip release
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2014-08-31 20:26:55 -07:00 |
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Henry Cook
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1bf5439f0b
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include new mm test in benchmarks
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2014-04-18 18:05:30 -07:00 |
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Andrew Waterman
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f04bde75fb
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New FP encoding
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2014-03-11 19:12:20 -07:00 |
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Yunsup Lee
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23045ec379
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add hwacha vfmsv instructions, keepcfg bug fix, turn off secondary fconv
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2014-03-02 03:38:06 -08:00 |
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Yunsup Lee
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bcfcdefe88
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update hwacha
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2014-02-27 04:39:12 -08:00 |
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Yunsup Lee
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46714c0c60
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more improvements to hwacha
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2014-02-26 21:20:53 -08:00 |
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Yunsup Lee
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a5625de3d5
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support vector irq tests
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2014-02-25 21:18:03 -08:00 |
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Yunsup Lee
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e5c2bd5e7b
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add extensions option to riscv-dis for better disassembly
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2014-02-25 03:50:32 -08:00 |
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Stephen Twigg
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6808245bb5
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Timeout cycles now defined in toplevel Makefrag in order to allow for easier alteration when debugging.
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2014-02-12 16:50:13 -08:00 |
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Yunsup Lee
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dbeadba2dc
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add vfmvv
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2014-02-05 03:28:33 -08:00 |
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Stephen Twigg
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8c96e27ca6
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Merge branch 'master' into hwacha-port
Mostly Stable version that is passing tests
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2014-02-04 17:20:28 -08:00 |
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Andrew Waterman
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e9d3a650a4
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Speed up C++ compilation
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2014-01-31 12:25:19 -08:00 |
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Andrew Waterman
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b6c6bddb62
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Add full CSRRx support and an asm test
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2014-01-21 16:20:24 -08:00 |
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Yunsup Lee
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5642194834
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push hwacha to consistent state
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2013-11-20 16:44:33 -08:00 |
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Stephen Twigg
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a870f51300
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Add some vector tests
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2013-11-14 15:56:25 -08:00 |
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Andrew Waterman
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628745226c
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Use spike disassembler riscv-dis if it exists
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2013-09-15 04:25:53 -07:00 |
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Andrew Waterman
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fbdbb01232
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update to new isa; disable vector tests
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2013-09-12 17:04:03 -07:00 |
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Henry Cook
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b06d33da2f
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Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes
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2013-08-19 19:54:41 -07:00 |
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Henry Cook
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896179cbb6
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removed bad mt test
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2013-06-14 00:14:18 -07:00 |
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Henry Cook
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85fbb650c9
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makefile support for new multithreading tests
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2013-06-13 15:34:54 -07:00 |
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Yunsup Lee
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a86ad08c1e
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commit awesome vlsi/energy scripts
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2013-05-01 02:59:11 -07:00 |
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Yunsup Lee
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a2f584e928
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add riscv-tests, get rid of riscv-asmtests-bmarks
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2013-04-29 19:29:51 -07:00 |
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Yunsup Lee
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9114012def
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assmebly tests are now built from riscv-tests
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2013-04-24 01:59:14 -07:00 |
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Andrew Waterman
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7f5282d355
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replace RDNPC with AUIPC
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2013-04-22 04:21:46 -07:00 |
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Andrew Waterman
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7ea782fd22
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add LR/SC
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2013-04-07 19:36:15 -07:00 |
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Andrew Waterman
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ef4927c9ad
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use a named pipe for VCD -> VPD conversion
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2013-03-25 16:19:19 -07:00 |
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Yunsup Lee
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bc140ce9bc
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add vec_{vvadd,cmplxmult,matmul} bmarks
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2013-03-19 00:43:51 -07:00 |
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Andrew Waterman
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d911e635d6
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simplify c++ memory models; support +dramsim flag
works for both vlsi and emulator
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2012-12-04 07:04:26 -08:00 |
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Andrew Waterman
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7330deb13a
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print stack trace if elaboration fails
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2012-11-20 05:39:48 -08:00 |
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Andrew Waterman
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4ed2d614a2
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update to new rocket; retime fpu in dc-syn
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2012-11-04 16:43:02 -08:00 |
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Andrew Waterman
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367b5489d1
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first crack at continuous compilation/testing flow
try it out: cd emulator; make test
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2012-10-19 04:09:07 -07:00 |
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Andrew Waterman
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edf0eeed01
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integrate updated rocket/uncore
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2012-10-18 17:51:41 -07:00 |
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Yunsup Lee
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34da073077
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fix tab
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2012-10-11 12:09:49 -07:00 |
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Huy Vo
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93a0182b96
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everything to get emulator working
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2012-10-01 19:30:11 -07:00 |
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