Wesley W. Terpstra
4b70386393
AsyncCrossing: disambiguate the file name
2017-01-26 20:07:28 -08:00
Wesley W. Terpstra
6ff35a387a
tilelink2: disable A=>D bypass in ToAXI4 whenever possible
2017-01-24 18:11:00 -08:00
Wesley W. Terpstra
64e1de751d
axi4: add a minLatency parameter
2017-01-24 18:11:00 -08:00
Wesley W. Terpstra
c0b6d31377
tilelink2: Delayer adapter useful for unit tests
2017-01-23 15:50:39 -08:00
Wesley W. Terpstra
9dc7f180b6
diplomacy: support zero-port Nodes
2017-01-19 19:08:01 -08:00
Wesley W. Terpstra
e7b35b4bb6
diplomacy: support multiple ports behind a BlindNode
2017-01-19 19:07:14 -08:00
Wesley W. Terpstra
4bdb2e5d68
tilelink2 Monitor: ReleaseAck source does not count
2017-01-19 19:07:14 -08:00
Wesley W. Terpstra
fbf1073586
tilelink2: CacheCork - terminate caching
2017-01-19 19:07:14 -08:00
Wesley W. Terpstra
bf7823f1c8
tilelink2: split suportsAcquire into T and B variants
2017-01-19 19:07:13 -08:00
Henry Cook
74b6a8d02b
Refactor Tile to use cake pattern ( #502 )
...
* [rocket] Refactor Tile into cake pattern with traits
* [rocket] cacheDataBits &etc in HasCoreParameters
* [rocket] pass TLEdgeOut implicitly rather than relying on val edge in HasCoreParameters
* [rocket] frontend and icache now diplomatic
* [rocket] file name capitalization
* [rocket] re-add hook for inserting externally-defined Cores
* [rocket] add FPUCoreIO
* [groundtest] move TL1 Config instances to where they are used
* [unittest] remove legacy unit tests
* [groundtest] remove legacy device tests
2017-01-16 18:24:08 -08:00
Jacob Chang
c531093898
Fix bug introduced with Fuzzer when nOperations is power of 2 ( #492 )
2016-12-15 19:10:53 -08:00
Wesley W. Terpstra
a9b264e582
ahb: lower hsel when idle to save power
2016-12-15 15:32:30 -08:00
Wesley W. Terpstra
16febe7e94
apb: add a TileLink to APB bridge and unittest it
2016-12-15 15:32:27 -08:00
Wesley W. Terpstra
ed091f55e6
apb: diplomatic APB framework
2016-12-15 13:48:50 -08:00
Wesley W. Terpstra
a5b8fc2317
RegisterRouterTest: start up with 0 in registers to make VIP testing easier
2016-12-14 15:38:08 -08:00
Wesley W. Terpstra
9d50704b64
ahb: don't violate spec with SRAM fuzzing
2016-12-14 15:18:41 -08:00
Jacob Chang
aae9b23036
Update with paratermized LazyModule
2016-12-12 16:16:56 -08:00
Jacob Chang
762afcd54a
Merge remote-tracking branch 'origin/master' into jchang_test
2016-12-09 16:56:49 -08:00
Jacob Chang
4c3083c181
Remove unnecessary val
2016-12-09 16:44:30 -08:00
Wesley W. Terpstra
09afbbafdb
ahb: weaken RegisterRouter assertion
...
As written I think it could potentially fail, but what I actually care
about is something weaker that should be true. Assert: nothing lost.
2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
588b944ed4
ahb: implement and test address decoding
2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
5d1064fcb1
ahb: include a unit test
2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
51dfb9cb06
ahb: TileLink master
2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
01b0f6a52b
ahb: new diplomacy-based AHB bus definition
2016-12-08 18:00:39 -08:00
Jacob Chang
54cc071a64
Fix Fragmenter to ensure logical operations must be sent out atomically.
...
Edited Fuzzer so that it can generate infinite operations when nOperations is net to 0
2016-12-07 16:22:05 -08:00
Wesley W. Terpstra
c2eedbfe23
tilelink2 Monitor: use Parameters instead of global variables
2016-12-07 12:24:03 -08:00
Wesley W. Terpstra
020fbe8be9
diplomacy: make config.Parameters available in bundle connect()
...
This makes it posisble to use Parameters to control Monitors.
However, we need to make all LazyModules carry Parameters.
2016-12-07 12:24:01 -08:00
Wesley W. Terpstra
fbfa15efea
TLBroadcast: support non-FIFO devices ( #482 )
2016-12-05 22:10:37 -08:00
Wesley W. Terpstra
3c9718ec8f
clint: undefined registers must be zero ( #480 )
...
This is needed so that SMP-safe boot loaders can safely
read/write to the IPI register of non-existent harts.
2016-12-05 17:11:53 -08:00
Jacob Chang
cff2612cdb
minor Changes needed to support formal tests
2016-12-01 15:02:23 -08:00
Wesley W. Terpstra
b7963eca4e
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
Wesley W. Terpstra
a0e10aec05
uncore: removed obsolete Builder file
2016-11-27 22:15:43 -08:00
Wesley W. Terpstra
30e890b480
diplomacy: include InternalNodes for AXI4 and TL
2016-11-23 20:44:45 -08:00
Henry Cook
38c5af5bad
[rocket] cleanup mshr logic
2016-11-23 12:09:56 -08:00
Henry Cook
dae6772624
factor out common cache subcomponents into uncore.util
2016-11-23 12:09:35 -08:00
Wesley W. Terpstra
1d3cad3671
tilelink2 SourceShrinker: handle degenerate cases for free
2016-11-22 22:17:30 -08:00
Wesley W. Terpstra
c0b27999ea
tilelink2 SourceShrinker: a concurrency reducing adapter
2016-11-22 21:43:38 -08:00
Wesley W. Terpstra
0097274ea3
Broadcast: single-cycle response is possible
2016-11-22 20:45:40 -08:00
Wesley W. Terpstra
c80ee06472
rocketchip: configString is a lazy property of outer
2016-11-22 17:27:58 -08:00
Henry Cook
28c6be90ab
[rocket] require refillcycesperbeat == 1 and remove flowthroughserializer
2016-11-20 19:36:51 -08:00
Henry Cook
c31b41a7ac
[tl2] add grant finisher comment
2016-11-19 19:16:43 -08:00
Wesley W. Terpstra
d1328a6b6f
rocketchip: remove most uses of GlobalAddrMap
2016-11-18 19:38:02 -08:00
Henry Cook
8b908465e0
[tl2] convert NBDcache to TL2 (WIP; compiles but untested)
2016-11-18 19:04:06 -08:00
Henry Cook
5f1cc19d71
[tl2] fix comment explaining permissions
2016-11-18 19:02:17 -08:00
Henry Cook
10112da4e7
[tl2] won't need putthrough opcode
2016-11-18 19:02:17 -08:00
Wesley W. Terpstra
5b594ced29
Plic: support 0 interrupts gracefully
2016-11-18 18:07:44 -08:00
Wesley W. Terpstra
03bca77b33
tilelink2 Metadata: cannot assert data good when !valid
2016-11-18 17:16:12 -08:00
Wesley W. Terpstra
37a3c22639
rocketchip: move from using cde to config
2016-11-18 16:18:33 -08:00
Wesley W. Terpstra
e5febcfa33
rocketchip: there are no more useful parameters to dump
2016-11-18 14:31:42 -08:00
Wesley W. Terpstra
30425d1665
rocketchip: eliminate all Knobs
2016-11-18 14:31:42 -08:00