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Commit Graph

5035 Commits

Author SHA1 Message Date
Andrew Waterman
dfa7a03f73 use assert, not Assert 2013-05-18 00:45:13 -07:00
Yunsup Lee
f3c78abc2b push riscv-tests 2013-05-16 00:51:02 -07:00
Yunsup Lee
e77bde71d0 push riscv-tools 2013-05-15 12:03:52 -07:00
Yunsup Lee
f0b0867f5a push riscv-tests 2013-05-13 19:22:28 -07:00
Yunsup Lee
f13605d2f5 push riscv-tools 2013-05-13 19:14:57 -07:00
Yunsup Lee
7ba3ab03e2 update README 2013-05-13 11:19:55 -07:00
Yunsup Lee
5b55cc93af add submodule riscv-tools 2013-05-10 11:53:55 -07:00
Andrew Waterman
0672773c1a for now, don't use asserts outside of components 2013-05-09 02:14:44 -07:00
Andrew Waterman
e8fcdb56a6 update chisel to work around xilinx ise bug 2013-05-03 01:47:15 -07:00
Andrew Waterman
d825c9d6e9 make fpga Makefile work with updated Makefrag 2013-05-02 05:09:45 -07:00
Andrew Waterman
cfa86dba4f add FPGA test bench
The memory models now support back pressure on the response.
2013-05-02 04:59:32 -07:00
Andrew Waterman
d2e1828714 gracefully kill htif thread, fixing tty stuff 2013-05-02 04:59:32 -07:00
Andrew Waterman
d405ffa949 assume all I$ grants bear data 2013-05-01 21:01:20 -07:00
Henry Cook
9a3b2e7006 new paired meta/data IO type, and matching arbiter 2013-05-01 17:18:12 -07:00
Andrew Waterman
474d321cc7 fix meta hazard counter to reset on new meta writes 2013-05-01 16:35:24 -07:00
Andrew Waterman
a6a88fce19 Revert "broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle"
This reverts commit b41e6bc50519631ba097ac1196737be7107295f9.
2013-05-01 16:34:45 -07:00
Andrew Waterman
63a38e7982 Revert "temp"
This reverts commit 73705e6ed8f98d08ce6b30fbe760de694c6563ae.
2013-05-01 16:34:33 -07:00
Henry Cook
b6945408cb temp 2013-05-01 10:24:36 -07:00
Henry Cook
722bc917d3 broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle 2013-05-01 10:05:54 -07:00
Yunsup Lee
a86ad08c1e commit awesome vlsi/energy scripts 2013-05-01 02:59:11 -07:00
Andrew Waterman
50bd9a08a7 resynchronize fpga uncore 2013-05-01 01:12:47 -07:00
Henry Cook
9a258e7fb4 use new locking round robin arbiter 2013-04-30 17:10:06 -07:00
Henry Cook
fedc2753e4 make sure master_xact_id field is large enough for temporary extra release trackers 2013-04-30 11:03:34 -07:00
Andrew Waterman
1501e90c1f interlock probe unit on tag RAW hazards 2013-04-30 00:38:22 -07:00
Yunsup Lee
a2f584e928 add riscv-tests, get rid of riscv-asmtests-bmarks 2013-04-29 19:29:51 -07:00
Henry Cook
12d394811e Allow release data to be written out even before all releases have been collected 2013-04-29 18:48:31 -07:00
Henry Cook
e8b20f3d38 clear meta state of silently-dropped, clean evictee, so as to prevent a write race on meta array between probes on evictee and refill grant 2013-04-25 17:41:04 -07:00
Yunsup Lee
7fe052e1bf update README 2013-04-24 02:05:28 -07:00
Yunsup Lee
9114012def assmebly tests are now built from riscv-tests 2013-04-24 01:59:14 -07:00
Yunsup Lee
93df795e48 change LLC leaf SRAM size 2013-04-22 11:06:50 -07:00
Andrew Waterman
7f5282d355 replace RDNPC with AUIPC 2013-04-22 04:21:46 -07:00
Andrew Waterman
50ccc20bf3 replace RDNPC with AUIPC 2013-04-22 04:20:15 -07:00
Huy Vo
2ac3fd5306 get rid of init_node 2013-04-20 01:36:32 -07:00
Huy Vo
0d87e3bacc fixed init pin generation 2013-04-20 00:38:01 -07:00
Henry Cook
a01cdf95fd tell physical networks carring cache lines to lock arbitration for REFILL_CYCLES pumps 2013-04-10 13:53:27 -07:00
Henry Cook
db5a060c7d fix io dir 2013-04-10 13:47:30 -07:00
Henry Cook
766d5622b1 Prevent messages from becoming interleaved in the BasicCrossbar. Remove dependency trackers from the uncore, use msg headers instead. Have one ReleaseHnadler per core for now. 2013-04-10 13:46:31 -07:00
Henry Cook
d7982bf27f bump uncore for grant fix 2013-04-09 14:29:49 -07:00
Henry Cook
74187c2068 Always route voluntary releases to ReleaseTracker to ensure all grants are sent 2013-04-09 14:09:55 -07:00
Andrew Waterman
7ea782fd22 add LR/SC 2013-04-07 19:36:15 -07:00
Andrew Waterman
ae7720e284 guarantee LR/SC forward progress
the mechanism is to block new probes for several cycles after a successful LR.

this also cleans up the MSHR <-> ProbeUnit interface slightly.
2013-04-07 19:27:21 -07:00
Andrew Waterman
7ff5b5b86f treat load-reserved as a non-dirtying store 2013-04-07 19:25:26 -07:00
Andrew Waterman
3479f1c6cd add LR/SC support 2013-04-07 19:25:20 -07:00
Andrew Waterman
e74e032c87 simplify MSHR memory response logic 2013-04-06 01:03:37 -07:00
Andrew Waterman
1abb9277db fix LR/SC atomicity violation
note, it's still not starvation-free.
2013-04-05 19:13:38 -07:00
Andrew Waterman
8cbdeb2abf add LR/SC support 2013-04-04 17:07:09 -07:00
Andrew Waterman
fc46daecf6 don't flush pipeline on writes to side-effect-free PCRs
notably, K0, K1, and EPC
2013-04-04 17:07:09 -07:00
Andrew Waterman
8b439ef20d only support setpcr/clearpcr of SR
the full PCR RMW support was wasted area/power
2013-04-04 17:07:08 -07:00
Andrew Waterman
d43f484feb take interrupts on nonzero fromhost values 2013-04-04 17:07:08 -07:00
Andrew Waterman
d4a3351cfc expose pending interrupts in status register 2013-04-04 17:07:08 -07:00