215 Commits

Author	SHA1	Message	Date
Wesley W. Terpstra	a3e56cfa5e	rocketchip: add Zero device to the memory subsystem	2017-02-03 17:19:24 -08:00
Wesley W. Terpstra	b240505a15	rocketchip: move memory channel Xbar from coreplex to rocketchip ... We want to keep the banks split in the outer SoC if there is an L3. Furthermore, each channel might go to different memory subsystems, like DDR/HMC/Zero, from rocketchip.	2017-02-03 17:19:21 -08:00
Wesley W. Terpstra	93b2fa197e	Artefact output (#545) ... * build: stop using empty .prm file * generator: general-purpose mechanism for creating elaboration artefacts	2017-02-02 19:24:55 -08:00
Wesley W. Terpstra	24ee7f45f5	rocketchip: pass variable l1tol2 connections into coreplex	2017-01-29 11:18:36 -08:00
Wesley W. Terpstra	03f2fe02ac	coreplex: support rational crossing to L2 (#534)	2017-01-27 17:09:43 -08:00
Wesley W. Terpstra	3a5e5a65f8	coreplex: support multiple memory channels via diplomatic trickery	2017-01-19 19:07:14 -08:00
Wesley W. Terpstra	e7b35b4bb6	diplomacy: support multiple ports behind a BlindNode	2017-01-19 19:07:14 -08:00
Megan Wachs	e22b01a6fa	jtag_dtm: Update regression to run and pass.	2017-01-18 12:08:13 -08:00
Henry Cook	9a6634cd40	Add TLBuffers on the L1 backends and blind exit points (#513) ... * [coreplex] add TLBuffers on the exit points from the Tile and Coreplex * [config] WithBootROMFile	2017-01-17 11:57:23 -08:00
Wesley W. Terpstra	52bb6cd9d9	Configs: use a uniform syntax without Match exceptions (#507) ... * Configs: use a uniform syntax without Match exceptions The old style of specifying Configs used total functions. The only way to indicate that a key was not matched was to throw an exception. Not only was this a performance concern, but it also caused confusing error messages whenever you had a match failure from a lookup within a lookup. The exception could get handled by an outer-lookup that then reported the wrong key as missing.	2017-01-13 14:41:19 -08:00
Wesley W. Terpstra	c2eedbfe23	tilelink2 Monitor: use Parameters instead of global variables	2016-12-07 12:24:03 -08:00
Wesley W. Terpstra	020fbe8be9	diplomacy: make config.Parameters available in bundle connect() ... This makes it posisble to use Parameters to control Monitors. However, we need to make all LazyModules carry Parameters.	2016-12-07 12:24:01 -08:00
Wesley W. Terpstra	b7963eca4e	copyright: ran scripts/modify-copyright	2016-11-27 22:15:43 -08:00
Wesley W. Terpstra	d755edffcc	DebugTransport: use ToAsyncDebugBus for correct depth	2016-11-25 18:10:28 -08:00
Wesley W. Terpstra	a670f63c81	periphery: a handy trait to turn-off ExtMem	2016-11-23 20:44:45 -08:00
Wesley W. Terpstra	9f1c668c4f	config: when modifying Parameters, subordinate lookups use top	2016-11-23 20:44:45 -08:00
Wesley W. Terpstra	566cc9e60b	rocketchip: RTCPeriod config	2016-11-23 20:44:45 -08:00
Wesley W. Terpstra	e87f54d4f7	rocketchip: traits for adding external TL2 ports	2016-11-23 20:44:42 -08:00
Wesley W. Terpstra	4b9dc78951	rocketchip: add a parameter-controlled debug port	2016-11-23 15:35:53 -08:00
Wesley W. Terpstra	1e7d597fd3	rocketchip: don't waste too many sources on the AXI master port	2016-11-22 21:48:41 -08:00
Wesley W. Terpstra	13190a5de0	rocketchip: re-add AXI4 interface	2016-11-22 17:27:58 -08:00
Wesley W. Terpstra	a140b07009	rocketchip: cut coreplex from rocketchip	2016-11-22 17:27:58 -08:00
Wesley W. Terpstra	c80ee06472	rocketchip: configString is a lazy property of outer	2016-11-22 17:27:58 -08:00
Wesley W. Terpstra	3d644b943c	coreplex: configString is a property of the RISCVPlatform	2016-11-21 21:13:26 -08:00
Wesley W. Terpstra	e8be365b5d	rocketchip: remove GlobalAddrMap completely	2016-11-21 21:13:26 -08:00
Wesley W. Terpstra	d1328a6b6f	rocketchip: remove most uses of GlobalAddrMap	2016-11-18 19:38:02 -08:00
Wesley W. Terpstra	001d9821bd	Merge remote-tracking branch 'origin/master' into tl2-tile	2016-11-18 18:19:41 -08:00
Wesley W. Terpstra	a6188efc41	rocketchip: break infinite Config loops	2016-11-18 16:18:33 -08:00
Wesley W. Terpstra	37a3c22639	rocketchip: move from using cde to config	2016-11-18 16:18:33 -08:00
Wesley W. Terpstra	30425d1665	rocketchip: eliminate all Knobs	2016-11-18 14:31:42 -08:00
Richard Xia	bab504cc3f	Add various granular and composable configs.	2016-11-18 11:30:07 -08:00
Wesley W. Terpstra	179c93db42	tilelink2 broadcast: make it controlled via Config	2016-11-17 17:26:49 -08:00
Wesley W. Terpstra	f4ca5ea1f3	rocketchip: match simulated memory width to ExtMem.beatBytes	2016-11-17 15:40:47 -08:00
Wesley W. Terpstra	12d0d8bea2	rocketchip: remove obsolete bus configuration	2016-11-17 14:30:15 -08:00
Wesley W. Terpstra	c82b371354	rocketchip: remove obsolete TL1 config	2016-11-17 14:24:45 -08:00
Wesley W. Terpstra	dfc3a0dafb	tilelink2: do not depend on obsolete TL1 configuration	2016-11-17 14:07:53 -08:00
Henry Cook	84f249bd03	[rocketchip] BigInt cast	2016-11-16 18:11:06 -08:00
Henry Cook	408e78e35e	rocketchip Periphery: ExtMem and ExtBus Configs	2016-11-16 16:50:30 -08:00
Wesley W. Terpstra	10e459fedb	rocket: change connection between rocketchip and coreplex ... * rtc and dtm are now crossed half-and-half on the two sides * groundtest no longer uses riscv platform traits	2016-11-15 18:27:52 -08:00
Wesley W. Terpstra	385b5d5698	axi4: default should be GET_EFFECTS	2016-11-14 15:19:39 -08:00
Wesley W. Terpstra	32fd11935c	rocketchip: use TL2 and AXI4 for memory subsytem	2016-11-04 13:36:47 -07:00
Wesley W. Terpstra	f943c5d6ef	rocketchip: connect rtcTick to coreplex	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	aabd17d935	rocketchip: must create bundles within Module scope ... 1. Bundles be created after base class Module constructor runs 2. Bundles must be created before Module(...) runs Solution: pass a bundle constructor to the cake base class Require the constructor to take a parameter so people don't use it by accident; they should get a type error. Consistently name all the cake arguments with an _io, _coreplex, _outer, so that they don't shadow the base class variables you should be using.	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	4de1822470	rocketchip: avoid using the nearly defunct GlobalAddrMap	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	688e1bffdf	rocketchip: pull rtcTick out of the coreplex	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	5bca13ebdb	rocketchip: use self-type constraints	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	d51b0b5c02	rocketchip: use self-type	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	ba529c3716	rocketchip: use TileLink2 interrupts	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	ac886026e6	rocketchip: reduce number of type parameters	2016-10-31 11:42:47 -07:00
Wesley W. Terpstra	72a7948ad2	rocketchip Periphery: move atomics before WidthWidget => 64-bit AMOs	2016-10-31 11:42:47 -07:00