Wesley W. Terpstra
16116991e7
Fix stateless caching ( #1084 )
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* tilelink: ToAXI4 should format it's error message
* WithStatelessBridge: mark the memory bus incoherent and cacheable
... and hope that the user doesn't put more than one master down.
2017-11-01 11:05:56 -07:00
Wesley W. Terpstra
4ccdbecb63
Async covers ( #1085 )
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* cover: support covering cross-product of ready-valid
* tilelink: AsyncCrossing now has covers for all flow control logic
2017-11-01 11:03:45 -07:00
Richard Xia
9e77045213
Merge pull request #1083 from freechipsproject/bump-riscv-tools
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Bump riscv-tools.
2017-10-31 20:55:10 -07:00
Richard Xia
f6ec7b765e
Bump riscv-tools.
2017-10-31 17:42:05 -07:00
Wesley W. Terpstra
84145959e1
tilelink: fix error fragmentation from multibeat to multibeat ( #1082 )
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Unfortunately, dLast is not actually correct for AccessAckData.
dFragnum is 0 for all the subbeats in the multibeat=>multibeat case.
2017-10-31 17:34:46 -07:00
Wesley W. Terpstra
8ec06151b0
interrupts: Crossing should use asynchronously reset registers ( #1080 )
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Otherwise you can get interrupts wedged high from a domain that has
not yet been clocked/powered up.
2017-10-31 16:29:06 -07:00
Megan Wachs
f86489b59e
JTAG: Use sorted map for stability ( #1073 )
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* JTAG: Use sorted map for stability
Otherwise the generated FIRRTL/Verilog is non deterministic
* jtag : parens for clarity
* jtag: Use deterministic ListMap and sort for stability
* JTAG: use slightly clearer SortedMap (clearer to me anyway)
* jtag: whitespace cleanup
2017-10-31 15:33:41 -07:00
Andrew Waterman
3db066303b
Fix ITIM bug overwriting I$ contents when deallocating ITIM ( #1079 )
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Workaround: disable interrupts and then do:
.align 3
sb x0, (t0) # t0 contains ITIM-deallocate address
fence.i
2017-10-31 00:49:56 -07:00
Wesley W. Terpstra
eaac0f6598
Merge pull request #1078 from freechipsproject/error-support
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Error support
2017-10-30 22:21:20 -07:00
Wesley W. Terpstra
45a904b396
ahb: ignore hrdata on an AHB error
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From the AHB spec:
"A slave only has to provide valid data when a transfer completes with an OKAY
response. ERROR responses do not require valid read data."
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
6318d7d44c
ahb: inject fuzzy errors
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
2912a76a2b
axi4: inject fuzzy errors
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
e8ed450f13
unit tests: do not use LFSR16 which has a common seed!
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We want each LFSR to generate independent noise.
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
ec70e5fb02
apb: inject fuzzy errors
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
0280a1f218
tilelink: add the ErrorEvaluator, a test bench error helper
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
2d12ddb4ed
tilelink: ToAXI4 makes R channel errors sticky
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
d6f1612812
tilelink: ToAHB should make read errors sticky as well
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
4c9d9c6331
tilelink: optimize WidthWidget error circuit to nothing
2017-10-30 21:09:45 -07:00
Wesley W. Terpstra
0992a459be
tilelink: Fragmenter should combine errors
2017-10-30 21:09:42 -07:00
Wesley W. Terpstra
13d0bf6808
tilelink: Monitor now enforces spec-defined error rules
2017-10-30 11:27:07 -07:00
Wesley W. Terpstra
5ca04a5c41
Merge pull request #1077 from freechipsproject/node-style
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diplomacy: switch adapter methods to node style
2017-10-28 13:15:28 -07:00
Wesley W. Terpstra
a954f020a9
diplomacy: use new node style chaining
2017-10-28 11:34:16 -07:00
Wesley W. Terpstra
6aac658184
diplomacy: convert all helper objects to return nodes
2017-10-28 11:34:16 -07:00
Wesley W. Terpstra
41705808dd
Bus: remove deprecated crossing attach methods
2017-10-28 11:34:16 -07:00
Wesley W. Terpstra
7cf5d4aa90
diplomacy: define only primary node types
2017-10-28 11:16:56 -07:00
Wesley W. Terpstra
eeb11a2693
coreplex: eliminate dead code
2017-10-27 01:13:35 -07:00
Wesley W. Terpstra
9f83db998e
tile: don't chain too many unneeded TileLink adapters ( #1075 )
2017-10-27 01:12:58 -07:00
Wesley W. Terpstra
e12bdfdf9b
coreplex: attach example external interrupts ( #1076 )
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Fixes #1071
2017-10-27 01:12:42 -07:00
Wesley W. Terpstra
13981379c4
CoreplexClockCrossing: add a helper method to decide if a clock is useul ( #1074 )
2017-10-26 23:39:56 -07:00
Wesley W. Terpstra
91d8a97f1a
Merge pull request #1065 from freechipsproject/better-bus-wrappers
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Better crossings deployed to bus and tile wrappers
2017-10-26 16:48:38 -07:00
Wesley W. Terpstra
1d8e539362
coreplex: confirm crossings actually cross the right boundary
2017-10-26 15:53:01 -07:00
Wesley W. Terpstra
60284082e7
diplomacy: add a hook for injecting code into LazyModule.module scope
2017-10-26 15:19:05 -07:00
Wesley W. Terpstra
a060c37173
diplomacy: expose the API to query a Node for its neighbours
2017-10-26 15:08:06 -07:00
Wesley W. Terpstra
e2d6d4d725
diplomacy: eliminate bindings dead-code
2017-10-26 15:02:21 -07:00
Wesley W. Terpstra
9e33ccdb05
rocket: clarify intent of boundaryBuffers and move to RocketTile
2017-10-26 13:58:52 -07:00
Wesley W. Terpstra
e76e0f6dce
interrupts: add debugstring to nodes to show sync depth in graphml
2017-10-26 13:58:52 -07:00
Wesley W. Terpstra
2acff8d21f
util: delete old long-deprecated crossing code
2017-10-26 13:58:52 -07:00
Wesley W. Terpstra
da7703aee9
crossings: deprecate non-island crossing style
2017-10-26 13:58:52 -07:00
Wesley W. Terpstra
76df1397e0
crossings: stop using deprecated APIs in tests
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
380cc6f03b
axi4: now also supports the island pattern
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
05d48d1807
TLBuffer: replace TLBufferChain with TLBuffer.chain
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
ce2b904b19
coreplex: tidy up interrupt crossings
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
e30906589f
coreplex: refactor crossings to use node pattern
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
6276ea4291
diplomacy: it possible for NodeHandles to put indirection on their attachment
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
8c5e8dd071
coreplex: leverage improved := composition
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
e894d64bca
diplomacy: support := composition
...
This makes it possible to treat chained composition associatively.
x := y :=? z :=* a ...
It also makes it easy to chain multiple optional adapters:
node :=? (Seq(a, b) ++ c ++ d)
2017-10-26 13:04:32 -07:00
Henry Cook
b48ab985d0
coreplex: RocketTileWrapper now HasCrossingHelper
2017-10-26 13:04:32 -07:00
Henry Cook
9fe35382ea
sbus: tile adapters in sbus scope
2017-10-26 13:04:32 -07:00
Henry Cook
95a2e6ef27
coreplex: improve tile attachment adapters
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
2175758050
interrupts: implement in crossing wrapper
2017-10-26 13:04:29 -07:00