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Author SHA1 Message Date
Henry Cook
12583af4a8
buswrapper: remove buffer chains from api (#1303) 
Just take a single BufferParams for all couplers.
Add TLBuffer.chain in the thunk if you need it.
Preserves default bufferings.
 2018-03-21 23:44:05 -07:00
Andrew Waterman
4cfae27efd
Implement Hauser misa.C misalignment proposal (#1301) 
See 0472bcdd16

- Reads of xEPC[1] are masked when RVC is disabled
- Writes to MISA are suppressed if they would cause a misaligned fetch
- Misaligned PCs no longer need to be checked in decode
 2018-03-21 23:42:01 -07:00
Wesley W. Terpstra
7f96da2288
ECC: support poison during encode (#1166) 
This makes it possible to update an ECC-protected word while
retaining the fact that the value has an ECC error.
 2018-03-21 16:29:24 -07:00
Henry Cook
7593baf2aa
Merge pull request #1299 from freechipsproject/serializable-metadata 
Store metadata in serializable case classes
 2018-03-21 11:58:05 -07:00
Henry Cook
f48c2767d7
subsytem: change front bus buffer defaults (#1300) 2018-03-21 11:56:22 -07:00
Megan Wachs
894960678c
Update Debug Module registers (#1296) 
* Debug: update versions of the files generated from the spec, mostly to get new SBA registers

* Debug: Clean up Halt Summary to use new terminology

* Debug: correct the address of HALTSUM1

* Debug: use simpler expression for numHaltedStatus

* Debug: remove now defunct haltStatus addr
 2018-03-20 14:01:22 -07:00
Henry Cook
70895b6ffa rocket: make RocketTileParams trivial to serialize 
By storing ECC setting as Option[String] and converting it
to a scala Code class later.
 2018-03-20 11:25:02 -07:00
Henry Cook
12997a644d tilelink: TLToAXI4IdMapEntry 2018-03-20 11:24:46 -07:00
Henry Cook
3cb9e57b5e diplomacy: AddressMapEntry and BindingScope.collect 2018-03-20 11:24:41 -07:00
Edmond Cote
2489a08328 Header required for -DVM_TRACE=1 (#1294) 
With -DVM_TRACE=1 on gcc 7.2.0.

Very small change.  May only affect me.  Is it possible -DVM_TRACE=1 is not regressed?

~~~~
http://en.cppreference.com/w/cpp/memory/unique_ptr
[..]/emulator.cc: In function ‘int main(int, char**)’:
[..]/emulator.cc:254:19: error: ‘VerilatedVcdFILE’ was not declared in this scope
   std::unique_ptr<VerilatedVcdFILE> vcdfd(new VerilatedVcdFILE(vcdfile));
~~~~
More info : http://en.cppreference.com/w/cpp/memory/unique_ptr

~~~~
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/7/lto-wrapper
OFFLOAD_TARGET_NAMES=nvptx-none
OFFLOAD_TARGET_DEFAULT=1
Target: x86_64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Ubuntu 7.2.0-8ubuntu3.2' --with-bugurl=file:///usr/share/doc/gcc-7/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++ --prefix=/usr --with-gcc-major-version-only --program-suffix=-7 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-libmpx --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu
Thread model: posix
gcc version 7.2.0 (Ubuntu 7.2.0-8ubuntu3.2) 
~~~~
 2018-03-19 20:07:28 -05:00
John Wright
9a56e44e32 Fix typo in RAMModel Get printf (#1293) 2018-03-19 11:30:41 -07:00
Andrew Waterman
d6bc9c53f0
Save a little power during reset by not writing D$ tags (#1287) 2018-03-15 19:23:09 -05:00
Megan Wachs
78dad3e89b
Merge pull request #1279 from freechipsproject/ipxact_descs 
More IP-XACT-like RegFieldDesc
 2018-03-14 06:46:00 -07:00
Megan Wachs
4e11491531 Merge remote-tracking branch 'origin/master' into ipxact_descs 2018-03-13 09:26:47 -07:00
Megan Wachs
1c1b6e8ffe
Merge pull request #1282 from freechipsproject/revert_debug_flags 
Revert "Debug: don't need to fully populate flags array"
 2018-03-13 09:09:39 -07:00
Megan Wachs
d00a0bba32 Revert "Debug: don't need to fully populate flags array" 
This reverts commit 197699b93a.
 2018-03-12 21:29:55 -07:00
Henry Cook
59d5e61366 regmapper: refactor how json is emitted 2018-03-12 08:24:36 -07:00
Henry Cook
ea89259dd4 RegFieldDesc: reserved omits () 2018-03-12 08:24:36 -07:00
Megan Wachs
15e058e3da RegFieldDesc: change how reserved is indicated 2018-03-12 08:24:36 -07:00
Megan Wachs
d889a0ca16 RegFieldDesc: add volatile to cause reg in BUE 2018-03-12 08:24:36 -07:00
Megan Wachs
e0c3c63826 RegFieldDesc: Update the .bytes method to emit reserved register fields 
instead of applying the same description to the registers that it doesn't
actually do anything with (the padding registers)
 2018-03-12 08:24:36 -07:00
Megan Wachs
0fcacd37df RegFieldDesc: mark some more registers as volatile 2018-03-12 08:24:36 -07:00
Megan Wachs
7458378a4a RegFieldDesc: Update reg field descs to be more correct for devices. 2018-03-12 08:24:36 -07:00
Megan Wachs
3063fd1b46 RegFieldDesc: update DescribedReg to suppot new features 2018-03-12 08:24:36 -07:00
Megan Wachs
2f239f2a9a RegFieldDesc: Add more features to support more IP-XACT like descriptions & emit them in the JSON 2018-03-12 08:24:36 -07:00
Henry Cook
e07b37c7ad
Merge pull request #1186 from edcote/patch-1 
Update TestDriver module to support FSDB
 2018-03-11 11:40:25 -07:00
Henry Cook
d3c16258fd
Merge pull request #1280 from freechipsproject/reg-desc-anno 
util: use chisel3.core.dontTouch
 2018-03-10 19:50:54 -08:00
Henry Cook
0e0963d360 util: use chisel3.core.dontTouch 2018-03-10 17:04:46 -08:00
Henry Cook
99862942fe
Merge pull request #1276 from freechipsproject/reg-desc-anno 
sbt: bump json4s-jackson to 3.5.3
 2018-03-08 19:04:23 -08:00
Henry Cook
1b93b27da4 util: restore dontTouch annotation; Chisel's is broken on 0 element Aggregates 2018-03-08 16:12:15 -08:00
Schuyler Eldridge
933f2ce958 Bump riscv-tools for riscv-fesvr submodule ptr fix (#1275) 
The riscv-fesvr submodule was pointing at my local version, oops. This
corrects that in an updated version of riscv-tools.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
 2018-03-08 14:27:51 -08:00
Henry Cook
d6e2c1a73f more != wire deprecations 2018-03-08 12:36:51 -08:00
Henry Cook
32592377c6 sbt: bump json4s-jackson to 3.5.3 2018-03-08 12:31:52 -08:00
Schuyler Eldridge
8bb397a1b9 Fix VCS argument parsing (#1266) 
* Add +permissive/+permissive-off for VCS args

This adds guards around Verilog/VCS options for VCS calls with HTIF's
new `+permissive`/`+permissive-off` options. This enables HTIF to
permissively parse all options inside one of these guards while not
erroring on unknonw commands. This is necessary for VCS, unlike with the
emulator, as HTIF is giving all commands as opposed to only host and
target arguments (like with Verilator/emulator.cc).

* Bump riscv-tools for fesvr VCS fix

* Bump riscv-rools/riscv-fesvr (VCS stderr fix)

Fixes #1266

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
 2018-03-07 22:59:04 -08:00
Megan Wachs
7d146f3401
Merge pull request #1273 from freechipsproject/no_jtag_vpi 
Deprecate JTAGVPI
 2018-03-07 14:50:26 -08:00
Megan Wachs
ef7a6115b7 vsim: don't need VPI without JTAGVPI 2018-03-07 10:58:09 -08:00
Megan Wachs
15dc7f6760 JTAGVPI: remove it from Chisel as it is unused 2018-03-07 10:55:45 -08:00
Megan Wachs
42e614550c JTAGVPI: remove it in favor of remote bitbang 2018-03-07 10:53:49 -08:00
Jack Koenig
64b707cbb6 Bump Chisel and FIRRTL for annotations refactor (#1261) 
Also brings in an autoclonetype enhancement and some bug fixes
 2018-03-07 10:22:38 -08:00
Schuyler Eldridge
d0b46c5b8f Align RoCCIO with new cloneType (#1270) 
- Aligns RoCC with #1232.
- Fixes #1268.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
 2018-03-06 17:53:51 -08:00
Megan Wachs
f1bd9c99aa
Merge pull request #1262 from freechipsproject/beu-regfield 
Add BusErrorUnit RegFieldDesc
 2018-03-06 12:31:00 -08:00
Megan Wachs
f00e9576e3
Merge pull request #1263 from freechipsproject/sim_jtag_reset 
SimJTAG: make the reset/init connectivity more flexible.
 2018-03-06 11:28:51 -08:00
Megan Wachs
b669fb3d6a Merge remote-tracking branch 'origin/master' into beu-regfield 2018-03-06 11:04:17 -08:00
Megan Wachs
2a0e67ab15
Merge pull request #1267 from freechipsproject/plic_source_0 
PLIC: Update RegFieldDesc:  source 0 is different
 2018-03-06 11:03:26 -08:00
Megan Wachs
a3d99e5ba2 DescribedReg: fix some imports 2018-03-06 11:02:10 -08:00
Megan Wachs
a20998e215 SimJTAG: fix verilog typo 2018-03-05 16:27:17 -08:00
Megan Wachs
8856953905 DescribedReg: move to regmapper 2018-03-05 16:12:14 -08:00
Megan Wachs
4256d99a9b PLIC: priority/threshold are really WARL (RWSPECIAL). Explain why. 2018-03-05 16:10:05 -08:00
Megan Wachs
41d1a62713 PLIC: Update RegFieldDesc to reflect the fact that source 0 isn't like all the others 2018-03-05 15:29:14 -08:00
Megan Wachs
bd3a72e585 Merge remote-tracking branch 'origin/master' into sim_jtag_reset 2018-03-05 12:41:39 -08:00