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Merge pull request #1280 from freechipsproject/reg-desc-anno 

util: use chisel3.core.dontTouch
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Henry Cook 2018-03-10 19:50:54 -08:00 committed by GitHub
parent 99862942fe 0e0963d360
commit d3c16258fd
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1 changed files with 4 additions and 7 deletions
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src/main/scala/util/Misc.scala
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@ -4,21 +4,18 @@
package freechips.rocketchip.util
import Chisel._
import chisel3.experimental.{ChiselAnnotation, RawModule}
import chisel3.experimental.RawModule
import freechips.rocketchip.config.Parameters
import scala.math._
class ParameterizedBundle(implicit p: Parameters) extends Bundle
// TODO: replace this with an implicit class when @chisel unprotects dontTouchPorts
trait DontTouch {
self: RawModule =>
trait DontTouch { self: RawModule =>
def dontTouch(data: Data): Unit = data match {
case agg: Aggregate =>
agg.getElements.foreach(dontTouch)
case elt: Element =>
annotate(ChiselAnnotation(elt, classOf[firrtl.Transform], "DONTtouch!"))
case agg: Aggregate => agg.getElements.foreach(dontTouch)
case elt: Element => chisel3.core.dontTouch(elt)
}
/** Marks every port as don't touch