2014-09-13 03:06:41 +02:00
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// See LICENSE for license details.
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2012-02-26 02:09:26 +01:00
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package rocket
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2011-10-26 08:02:47 +02:00
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import Chisel._
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2013-11-25 13:35:15 +01:00
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/* Automatically generated by parse-opcodes */
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object Instructions {
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2015-07-28 11:48:49 +02:00
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def BEQ = BitPat("b?????????????????000?????1100011")
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def BNE = BitPat("b?????????????????001?????1100011")
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def BLT = BitPat("b?????????????????100?????1100011")
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def BGE = BitPat("b?????????????????101?????1100011")
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def BLTU = BitPat("b?????????????????110?????1100011")
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def BGEU = BitPat("b?????????????????111?????1100011")
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def JALR = BitPat("b?????????????????000?????1100111")
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def JAL = BitPat("b?????????????????????????1101111")
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def LUI = BitPat("b?????????????????????????0110111")
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def AUIPC = BitPat("b?????????????????????????0010111")
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def ADDI = BitPat("b?????????????????000?????0010011")
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def SLLI = BitPat("b000000???????????001?????0010011")
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def SLTI = BitPat("b?????????????????010?????0010011")
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def SLTIU = BitPat("b?????????????????011?????0010011")
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def XORI = BitPat("b?????????????????100?????0010011")
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def SRLI = BitPat("b000000???????????101?????0010011")
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def SRAI = BitPat("b010000???????????101?????0010011")
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def ORI = BitPat("b?????????????????110?????0010011")
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def ANDI = BitPat("b?????????????????111?????0010011")
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def ADD = BitPat("b0000000??????????000?????0110011")
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def SUB = BitPat("b0100000??????????000?????0110011")
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def SLL = BitPat("b0000000??????????001?????0110011")
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def SLT = BitPat("b0000000??????????010?????0110011")
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def SLTU = BitPat("b0000000??????????011?????0110011")
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def XOR = BitPat("b0000000??????????100?????0110011")
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def SRL = BitPat("b0000000??????????101?????0110011")
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def SRA = BitPat("b0100000??????????101?????0110011")
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def OR = BitPat("b0000000??????????110?????0110011")
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def AND = BitPat("b0000000??????????111?????0110011")
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def ADDIW = BitPat("b?????????????????000?????0011011")
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def SLLIW = BitPat("b0000000??????????001?????0011011")
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def SRLIW = BitPat("b0000000??????????101?????0011011")
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def SRAIW = BitPat("b0100000??????????101?????0011011")
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def ADDW = BitPat("b0000000??????????000?????0111011")
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def SUBW = BitPat("b0100000??????????000?????0111011")
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def SLLW = BitPat("b0000000??????????001?????0111011")
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def SRLW = BitPat("b0000000??????????101?????0111011")
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def SRAW = BitPat("b0100000??????????101?????0111011")
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def LB = BitPat("b?????????????????000?????0000011")
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def LH = BitPat("b?????????????????001?????0000011")
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def LW = BitPat("b?????????????????010?????0000011")
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def LD = BitPat("b?????????????????011?????0000011")
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def LBU = BitPat("b?????????????????100?????0000011")
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def LHU = BitPat("b?????????????????101?????0000011")
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def LWU = BitPat("b?????????????????110?????0000011")
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def SB = BitPat("b?????????????????000?????0100011")
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def SH = BitPat("b?????????????????001?????0100011")
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def SW = BitPat("b?????????????????010?????0100011")
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def SD = BitPat("b?????????????????011?????0100011")
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def FENCE = BitPat("b?????????????????000?????0001111")
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def FENCE_I = BitPat("b?????????????????001?????0001111")
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def MUL = BitPat("b0000001??????????000?????0110011")
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def MULH = BitPat("b0000001??????????001?????0110011")
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def MULHSU = BitPat("b0000001??????????010?????0110011")
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def MULHU = BitPat("b0000001??????????011?????0110011")
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def DIV = BitPat("b0000001??????????100?????0110011")
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def DIVU = BitPat("b0000001??????????101?????0110011")
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def REM = BitPat("b0000001??????????110?????0110011")
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def REMU = BitPat("b0000001??????????111?????0110011")
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def MULW = BitPat("b0000001??????????000?????0111011")
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def DIVW = BitPat("b0000001??????????100?????0111011")
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def DIVUW = BitPat("b0000001??????????101?????0111011")
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def REMW = BitPat("b0000001??????????110?????0111011")
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def REMUW = BitPat("b0000001??????????111?????0111011")
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def AMOADD_W = BitPat("b00000????????????010?????0101111")
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def AMOXOR_W = BitPat("b00100????????????010?????0101111")
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def AMOOR_W = BitPat("b01000????????????010?????0101111")
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def AMOAND_W = BitPat("b01100????????????010?????0101111")
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def AMOMIN_W = BitPat("b10000????????????010?????0101111")
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def AMOMAX_W = BitPat("b10100????????????010?????0101111")
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def AMOMINU_W = BitPat("b11000????????????010?????0101111")
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def AMOMAXU_W = BitPat("b11100????????????010?????0101111")
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def AMOSWAP_W = BitPat("b00001????????????010?????0101111")
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def LR_W = BitPat("b00010??00000?????010?????0101111")
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def SC_W = BitPat("b00011????????????010?????0101111")
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def AMOADD_D = BitPat("b00000????????????011?????0101111")
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def AMOXOR_D = BitPat("b00100????????????011?????0101111")
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def AMOOR_D = BitPat("b01000????????????011?????0101111")
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def AMOAND_D = BitPat("b01100????????????011?????0101111")
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def AMOMIN_D = BitPat("b10000????????????011?????0101111")
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def AMOMAX_D = BitPat("b10100????????????011?????0101111")
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def AMOMINU_D = BitPat("b11000????????????011?????0101111")
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def AMOMAXU_D = BitPat("b11100????????????011?????0101111")
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def AMOSWAP_D = BitPat("b00001????????????011?????0101111")
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def LR_D = BitPat("b00010??00000?????011?????0101111")
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def SC_D = BitPat("b00011????????????011?????0101111")
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def SCALL = BitPat("b00000000000000000000000001110011")
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def SBREAK = BitPat("b00000000000100000000000001110011")
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def SRET = BitPat("b00010000000000000000000001110011")
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def SFENCE_VM = BitPat("b000100000001?????000000001110011")
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def WFI = BitPat("b00010000001000000000000001110011")
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def MRTH = BitPat("b00110000011000000000000001110011")
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def MRTS = BitPat("b00110000010100000000000001110011")
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def HRTS = BitPat("b00100000010100000000000001110011")
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def CSRRW = BitPat("b?????????????????001?????1110011")
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def CSRRS = BitPat("b?????????????????010?????1110011")
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def CSRRC = BitPat("b?????????????????011?????1110011")
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def CSRRWI = BitPat("b?????????????????101?????1110011")
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def CSRRSI = BitPat("b?????????????????110?????1110011")
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def CSRRCI = BitPat("b?????????????????111?????1110011")
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def FADD_S = BitPat("b0000000??????????????????1010011")
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def FSUB_S = BitPat("b0000100??????????????????1010011")
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def FMUL_S = BitPat("b0001000??????????????????1010011")
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def FDIV_S = BitPat("b0001100??????????????????1010011")
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def FSGNJ_S = BitPat("b0010000??????????000?????1010011")
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def FSGNJN_S = BitPat("b0010000??????????001?????1010011")
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def FSGNJX_S = BitPat("b0010000??????????010?????1010011")
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def FMIN_S = BitPat("b0010100??????????000?????1010011")
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def FMAX_S = BitPat("b0010100??????????001?????1010011")
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def FSQRT_S = BitPat("b010110000000?????????????1010011")
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def FADD_D = BitPat("b0000001??????????????????1010011")
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def FSUB_D = BitPat("b0000101??????????????????1010011")
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def FMUL_D = BitPat("b0001001??????????????????1010011")
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def FDIV_D = BitPat("b0001101??????????????????1010011")
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def FSGNJ_D = BitPat("b0010001??????????000?????1010011")
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def FSGNJN_D = BitPat("b0010001??????????001?????1010011")
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def FSGNJX_D = BitPat("b0010001??????????010?????1010011")
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def FMIN_D = BitPat("b0010101??????????000?????1010011")
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def FMAX_D = BitPat("b0010101??????????001?????1010011")
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def FCVT_S_D = BitPat("b010000000001?????????????1010011")
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def FCVT_D_S = BitPat("b010000100000?????????????1010011")
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def FSQRT_D = BitPat("b010110100000?????????????1010011")
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def FLE_S = BitPat("b1010000??????????000?????1010011")
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def FLT_S = BitPat("b1010000??????????001?????1010011")
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def FEQ_S = BitPat("b1010000??????????010?????1010011")
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def FLE_D = BitPat("b1010001??????????000?????1010011")
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def FLT_D = BitPat("b1010001??????????001?????1010011")
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def FEQ_D = BitPat("b1010001??????????010?????1010011")
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def FCVT_W_S = BitPat("b110000000000?????????????1010011")
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def FCVT_WU_S = BitPat("b110000000001?????????????1010011")
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def FCVT_L_S = BitPat("b110000000010?????????????1010011")
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def FCVT_LU_S = BitPat("b110000000011?????????????1010011")
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def FMV_X_S = BitPat("b111000000000?????000?????1010011")
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def FCLASS_S = BitPat("b111000000000?????001?????1010011")
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def FCVT_W_D = BitPat("b110000100000?????????????1010011")
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def FCVT_WU_D = BitPat("b110000100001?????????????1010011")
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def FCVT_L_D = BitPat("b110000100010?????????????1010011")
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def FCVT_LU_D = BitPat("b110000100011?????????????1010011")
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def FMV_X_D = BitPat("b111000100000?????000?????1010011")
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def FCLASS_D = BitPat("b111000100000?????001?????1010011")
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def FCVT_S_W = BitPat("b110100000000?????????????1010011")
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def FCVT_S_WU = BitPat("b110100000001?????????????1010011")
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def FCVT_S_L = BitPat("b110100000010?????????????1010011")
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def FCVT_S_LU = BitPat("b110100000011?????????????1010011")
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def FMV_S_X = BitPat("b111100000000?????000?????1010011")
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def FCVT_D_W = BitPat("b110100100000?????????????1010011")
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def FCVT_D_WU = BitPat("b110100100001?????????????1010011")
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def FCVT_D_L = BitPat("b110100100010?????????????1010011")
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def FCVT_D_LU = BitPat("b110100100011?????????????1010011")
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def FMV_D_X = BitPat("b111100100000?????000?????1010011")
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def FLW = BitPat("b?????????????????010?????0000111")
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def FLD = BitPat("b?????????????????011?????0000111")
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def FSW = BitPat("b?????????????????010?????0100111")
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def FSD = BitPat("b?????????????????011?????0100111")
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def FMADD_S = BitPat("b?????00??????????????????1000011")
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def FMSUB_S = BitPat("b?????00??????????????????1000111")
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def FNMSUB_S = BitPat("b?????00??????????????????1001011")
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def FNMADD_S = BitPat("b?????00??????????????????1001111")
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def FMADD_D = BitPat("b?????01??????????????????1000011")
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def FMSUB_D = BitPat("b?????01??????????????????1000111")
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def FNMSUB_D = BitPat("b?????01??????????????????1001011")
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def FNMADD_D = BitPat("b?????01??????????????????1001111")
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def CUSTOM0 = BitPat("b?????????????????000?????0001011")
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def CUSTOM0_RS1 = BitPat("b?????????????????010?????0001011")
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def CUSTOM0_RS1_RS2 = BitPat("b?????????????????011?????0001011")
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def CUSTOM0_RD = BitPat("b?????????????????100?????0001011")
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def CUSTOM0_RD_RS1 = BitPat("b?????????????????110?????0001011")
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def CUSTOM0_RD_RS1_RS2 = BitPat("b?????????????????111?????0001011")
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def CUSTOM1 = BitPat("b?????????????????000?????0101011")
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def CUSTOM1_RS1 = BitPat("b?????????????????010?????0101011")
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def CUSTOM1_RS1_RS2 = BitPat("b?????????????????011?????0101011")
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def CUSTOM1_RD = BitPat("b?????????????????100?????0101011")
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def CUSTOM1_RD_RS1 = BitPat("b?????????????????110?????0101011")
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def CUSTOM1_RD_RS1_RS2 = BitPat("b?????????????????111?????0101011")
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def CUSTOM2 = BitPat("b?????????????????000?????1011011")
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def CUSTOM2_RS1 = BitPat("b?????????????????010?????1011011")
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def CUSTOM2_RS1_RS2 = BitPat("b?????????????????011?????1011011")
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def CUSTOM2_RD = BitPat("b?????????????????100?????1011011")
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def CUSTOM2_RD_RS1 = BitPat("b?????????????????110?????1011011")
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def CUSTOM2_RD_RS1_RS2 = BitPat("b?????????????????111?????1011011")
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def CUSTOM3 = BitPat("b?????????????????000?????1111011")
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def CUSTOM3_RS1 = BitPat("b?????????????????010?????1111011")
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def CUSTOM3_RS1_RS2 = BitPat("b?????????????????011?????1111011")
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def CUSTOM3_RD = BitPat("b?????????????????100?????1111011")
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def CUSTOM3_RD_RS1 = BitPat("b?????????????????110?????1111011")
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def CUSTOM3_RD_RS1_RS2 = BitPat("b?????????????????111?????1111011")
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2015-09-28 20:52:27 +02:00
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def SLLI_RV32 = BitPat("b0000000??????????001?????0010011")
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def SRLI_RV32 = BitPat("b0000000??????????101?????0010011")
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def SRAI_RV32 = BitPat("b0100000??????????101?????0010011")
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def FRFLAGS = BitPat("b00000000000100000010?????1110011")
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def FSFLAGS = BitPat("b000000000001?????001?????1110011")
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def FSFLAGSI = BitPat("b000000000001?????101?????1110011")
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def FRRM = BitPat("b00000000001000000010?????1110011")
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def FSRM = BitPat("b000000000010?????001?????1110011")
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def FSRMI = BitPat("b000000000010?????101?????1110011")
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def FSCSR = BitPat("b000000000011?????001?????1110011")
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def FRCSR = BitPat("b00000000001100000010?????1110011")
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def RDCYCLE = BitPat("b11000000000000000010?????1110011")
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def RDTIME = BitPat("b11000000000100000010?????1110011")
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def RDINSTRET = BitPat("b11000000001000000010?????1110011")
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def RDCYCLEH = BitPat("b11001000000000000010?????1110011")
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def RDTIMEH = BitPat("b11001000000100000010?????1110011")
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def RDINSTRETH = BitPat("b11001000001000000010?????1110011")
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def ECALL = BitPat("b00000000000000000000000001110011")
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def EBREAK = BitPat("b00000000000100000000000001110011")
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def ERET = BitPat("b00010000000000000000000001110011")
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2013-06-13 19:31:04 +02:00
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}
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2014-01-22 00:01:54 +01:00
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object Causes {
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val misaligned_fetch = 0x0
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val fault_fetch = 0x1
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val illegal_instruction = 0x2
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2015-05-19 03:23:58 +02:00
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val breakpoint = 0x3
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2015-03-17 10:24:41 +01:00
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val misaligned_load = 0x4
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val fault_load = 0x5
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val misaligned_store = 0x6
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val fault_store = 0x7
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2015-05-19 03:23:58 +02:00
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val user_ecall = 0x8
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val supervisor_ecall = 0x9
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val hypervisor_ecall = 0xa
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val machine_ecall = 0xb
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2014-01-22 00:01:54 +01:00
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val all = {
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val res = collection.mutable.ArrayBuffer[Int]()
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res += misaligned_fetch
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res += fault_fetch
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res += illegal_instruction
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2015-05-19 03:23:58 +02:00
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res += breakpoint
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2014-01-22 00:01:54 +01:00
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res += misaligned_load
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res += fault_load
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2015-03-14 10:49:07 +01:00
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res += misaligned_store
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2014-01-22 00:01:54 +01:00
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res += fault_store
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2015-05-19 03:23:58 +02:00
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res += user_ecall
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res += supervisor_ecall
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res += hypervisor_ecall
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res += machine_ecall
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2014-01-22 00:01:54 +01:00
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res.toArray
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}
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}
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2013-11-25 13:35:15 +01:00
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object CSRs {
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2013-12-10 00:06:13 +01:00
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val fflags = 0x1
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val frm = 0x2
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val fcsr = 0x3
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val cycle = 0xc00
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val time = 0xc01
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val instret = 0xc02
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2015-03-14 10:49:07 +01:00
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val stats = 0xc0
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2014-02-15 02:40:00 +01:00
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val uarch0 = 0xcc0
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val uarch1 = 0xcc1
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val uarch2 = 0xcc2
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val uarch3 = 0xcc3
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val uarch4 = 0xcc4
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val uarch5 = 0xcc5
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val uarch6 = 0xcc6
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val uarch7 = 0xcc7
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val uarch8 = 0xcc8
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val uarch9 = 0xcc9
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val uarch10 = 0xcca
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val uarch11 = 0xccb
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val uarch12 = 0xccc
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val uarch13 = 0xccd
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val uarch14 = 0xcce
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val uarch15 = 0xccf
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2015-03-14 10:49:07 +01:00
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val sstatus = 0x100
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val stvec = 0x101
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2015-05-19 03:23:58 +02:00
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val sie = 0x104
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2015-03-14 10:49:07 +01:00
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val sscratch = 0x140
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val sepc = 0x141
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2015-05-19 03:23:58 +02:00
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val sip = 0x144
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val sptbr = 0x180
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val sasid = 0x181
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val cyclew = 0x900
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val timew = 0x901
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val instretw = 0x902
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val stime = 0xd01
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val scause = 0xd42
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val sbadaddr = 0xd43
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val stimew = 0xa01
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2015-03-14 10:49:07 +01:00
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val mstatus = 0x300
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2015-05-19 03:23:58 +02:00
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val mtvec = 0x301
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val mtdeleg = 0x302
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val mie = 0x304
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val mtimecmp = 0x321
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2015-03-14 10:49:07 +01:00
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val mscratch = 0x340
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val mepc = 0x341
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val mcause = 0x342
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val mbadaddr = 0x343
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2015-05-19 03:23:58 +02:00
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val mip = 0x344
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val mtime = 0x701
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val mcpuid = 0xf00
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val mimpid = 0xf01
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val mhartid = 0xf10
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val mtohost = 0x780
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val mfromhost = 0x781
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val mreset = 0x782
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2015-11-17 06:51:43 +01:00
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val mipi = 0x783
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val miobase = 0x784
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2014-03-16 01:33:17 +01:00
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val cycleh = 0xc80
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val timeh = 0xc81
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val instreth = 0xc82
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2015-05-19 03:23:58 +02:00
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val cyclehw = 0x980
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val timehw = 0x981
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val instrethw = 0x982
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val stimeh = 0xd81
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val stimehw = 0xa81
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2015-07-06 01:38:49 +02:00
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val mtimecmph = 0x361
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2015-05-19 03:23:58 +02:00
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val mtimeh = 0x741
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2016-01-14 20:37:58 +01:00
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val mrwbase = 0x790
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2013-11-25 13:35:15 +01:00
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val all = {
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val res = collection.mutable.ArrayBuffer[Int]()
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res += fflags
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res += frm
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res += fcsr
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2013-12-10 00:06:13 +01:00
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res += cycle
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res += time
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res += instret
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2015-03-14 10:49:07 +01:00
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res += stats
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2014-02-06 10:48:56 +01:00
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res += uarch0
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res += uarch1
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res += uarch2
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res += uarch3
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res += uarch4
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res += uarch5
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res += uarch6
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res += uarch7
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res += uarch8
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res += uarch9
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res += uarch10
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res += uarch11
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res += uarch12
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res += uarch13
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res += uarch14
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res += uarch15
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2015-03-14 10:49:07 +01:00
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res += sstatus
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res += stvec
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2015-05-19 03:23:58 +02:00
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res += sie
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2015-03-14 10:49:07 +01:00
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res += sscratch
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res += sepc
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2015-05-19 03:23:58 +02:00
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res += sip
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2015-03-14 10:49:07 +01:00
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res += sptbr
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res += sasid
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2015-05-19 03:23:58 +02:00
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|
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res += cyclew
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res += timew
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res += instretw
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2015-03-14 10:49:07 +01:00
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|
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res += stime
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res += scause
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res += sbadaddr
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2015-05-19 03:23:58 +02:00
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|
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res += stimew
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2015-03-14 10:49:07 +01:00
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res += mstatus
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2015-05-19 03:23:58 +02:00
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|
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res += mtvec
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|
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res += mtdeleg
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|
res += mie
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|
|
res += mtimecmp
|
2015-03-14 10:49:07 +01:00
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|
|
res += mscratch
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res += mepc
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|
|
res += mcause
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|
|
res += mbadaddr
|
2015-05-19 03:23:58 +02:00
|
|
|
res += mip
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|
|
res += mtime
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|
|
res += mcpuid
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|
|
res += mimpid
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|
|
res += mhartid
|
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|
|
res += mtohost
|
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|
|
res += mfromhost
|
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|
|
res += mreset
|
2015-11-17 06:51:43 +01:00
|
|
|
res += mipi
|
|
|
|
res += miobase
|
2013-11-25 13:35:15 +01:00
|
|
|
res.toArray
|
|
|
|
}
|
2014-03-16 01:33:17 +01:00
|
|
|
val all32 = {
|
|
|
|
val res = collection.mutable.ArrayBuffer(all:_*)
|
|
|
|
res += cycleh
|
|
|
|
res += timeh
|
|
|
|
res += instreth
|
2015-05-19 03:23:58 +02:00
|
|
|
res += cyclehw
|
|
|
|
res += timehw
|
|
|
|
res += instrethw
|
2015-03-14 10:49:07 +01:00
|
|
|
res += stimeh
|
2015-05-19 03:23:58 +02:00
|
|
|
res += stimehw
|
2015-07-06 01:38:49 +02:00
|
|
|
res += mtimecmph
|
2015-05-19 03:23:58 +02:00
|
|
|
res += mtimeh
|
2014-03-16 01:33:17 +01:00
|
|
|
res.toArray
|
|
|
|
}
|
2013-11-25 13:35:15 +01:00
|
|
|
}
|