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computer/firmware/alu
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Klemens Schölhorn 1116ec8a50 Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
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tests Ad test bench for the computer control logic 2018-05-31 22:31:15 +02:00
.gitignore Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
CPLD1.ucf Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
CPLD1.vhd Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
CPLD2.ucf Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
CPLD2.vhd Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
adder.vhd Add toy alu with initial testbench 2018-03-09 01:52:19 +01:00
alu.vhd Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00
alu.xise Add top modules and pin constraints for the two ALU CPLDs 2018-07-26 21:44:35 +02:00