 Klemens Schölhorn
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1116ec8a50
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Add top modules and pin constraints for the two ALU CPLDs
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2018-07-26 21:44:35 +02:00 |
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Klemens Schölhorn
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e1a3ab745c
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Ad test bench for the computer control logic
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2018-05-31 22:31:15 +02:00 |
Max Braungardt
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c1e2d4f4e1
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Add more overflow ADD and SUB tests
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2018-04-26 20:10:36 +02:00 |
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Max Braungardt
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a1bebb977e
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Fix INC and DEC by specifying if alu is the first one
If it is not the first, only increment or decrement when carry or
borrow is set.
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2018-04-26 20:09:04 +02:00 |
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Max Braungardt
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fdedf7b657
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Add tests for INC and DEC
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2018-04-26 20:08:16 +02:00 |
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Klemens Schölhorn
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091884bab2
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Add toy alu with initial testbench
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2018-03-09 01:52:19 +01:00 |