| .. |
|
ahb.scala
|
ahb: allow no-ops to progress also when a slave is !hready
|
2016-06-09 10:41:12 -07:00 |
|
amoalu.scala
|
ahb: amoalu does not need so many parameters! (i want to reuse it)
|
2016-05-24 14:58:27 -07:00 |
|
bram.scala
|
Fix valid signal for multibeat grants
|
2016-06-08 15:13:39 -07:00 |
|
broadcast.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
bufferless.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
builder.scala
|
Add config classes to drive unit testing of L2 TileLink agents.
|
2016-05-20 16:15:43 -07:00 |
|
cache.scala
|
make sure merged no-alloc put still allocs if original put allocs
|
2016-06-16 15:34:31 -07:00 |
|
coherence.scala
|
fix more Chisel3 deprecations
|
2016-01-14 14:55:45 -08:00 |
|
consts.scala
|
Add M_FLUSH_ALL command
|
2016-05-31 19:25:31 -07:00 |
|
converters.scala
|
fix mistaken dequeueing from roq in TileLink unwrapper
|
2016-06-16 15:34:31 -07:00 |
|
debug.scala
|
Add smaller ROM/RAM for 32-bit debug (#60)
|
2016-06-15 15:07:43 -07:00 |
|
directory.scala
|
First pages commit
|
2015-04-29 13:18:26 -07:00 |
|
dma.scala
|
make sure CSR width is parameterizable
|
2016-02-02 12:49:58 -08:00 |
|
ecc.scala
|
Avoid floating-point arithmetic where integers suffice
|
2016-06-01 21:59:02 -07:00 |
|
htif.scala
|
Work around zero-width wire limitation in HTIF
|
2016-05-25 20:39:53 -07:00 |
|
interconnect.scala
|
Cope with changes to AddrMap
|
2016-06-03 13:48:09 -07:00 |
|
metadata.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
network.scala
|
Use buses, rather than crossbars, by default in TLInterconnect
|
2016-05-26 16:10:42 -07:00 |
|
package.scala
|
First pages commit
|
2015-04-29 13:18:26 -07:00 |
|
plic.scala
|
Update PLIC addr map
|
2016-06-05 23:04:51 -07:00 |
|
prci.scala
|
Avoid need for cloneType
|
2016-06-05 23:47:56 -07:00 |
|
rom.scala
|
Fix arithmetic in ROM row count
|
2016-06-01 21:59:02 -07:00 |
|
rtc.scala
|
rtc: fix acquire message type check
|
2016-05-25 20:37:48 -07:00 |
|
scr.scala
|
print the base address of each SCR as indicated
|
2016-04-28 16:31:56 +01:00 |
|
sdq.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
smi.scala
|
Add a Smi to TileLink converter (#59)
|
2016-06-10 14:04:28 -07:00 |
|
tilelink.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
trackers.scala
|
make sure merged no-alloc put still allocs if original put allocs
|
2016-06-16 15:34:31 -07:00 |
|
uncore.scala
|
Refactor the TransactionTracker logic in all the L2 TileLink Managers.
|
2016-06-16 15:18:48 -07:00 |
|
util.scala
|
Avoid floating-point arithmetic where integers suffice
|
2016-06-01 21:59:02 -07:00 |
