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rocket-chip/rocket/src/main/scala
Howard Mao dcfcac9530 fix LRSC issue (RocketChip issue #86)
It was possible that the result of a store-conditional could get lost if it
did not depend on the result of the corresponding load-reserved.

This was because the MSHR does not update the client state based on the
secondary requests. So the LR would acquire the line in clientExcusiveClean,
but then we would fail to update the metadata array to change the state
to clientExclusiveDirty.

The solution is to track whether a secondary acquire would cause the
line to be dirty. If so, use M_XWR instead of the primary command to
generate the update coherence state.
2016-07-26 18:41:52 -07:00
..
arbiter.scala HellaCacheArbiter passes through if n == 1 2016-07-18 17:01:29 -07:00
breakpoint.scala Refactor breakpoints and support range comparison (currently disabled) 2016-06-10 19:55:58 -07:00
btb.scala Explicitly discard BTB index LSBs 2016-07-14 17:10:27 -07:00
consts.scala WIP on priv spec v1.9 2016-03-02 23:29:58 -08:00
csr.scala add U bit to misa register 2016-07-22 14:22:59 -07:00
dcache.scala Clean up some zero-width wire cases using UInt.extract 2016-07-14 22:08:01 -07:00
decode.scala Use Seq, not Iterable, when traversal order matters 2015-07-29 00:24:58 -07:00
dma.scala changes to imports after uncore refactor 2016-06-28 14:09:31 -07:00
dpath_alu.scala Improve ALU QoR 2016-01-20 17:42:31 -08:00
fpu.scala Don't implicitly create Vecs, since they're heavyweight 2016-07-06 01:41:31 -07:00
frontend.scala Clean up some zero-width wire cases using UInt.extract 2016-07-14 22:08:01 -07:00
icache.scala Clean up some zero-width wire cases using UInt.extract 2016-07-14 22:08:01 -07:00
idecode.scala First stab at debug interrupts 2016-06-01 16:57:10 -07:00
instructions.scala Merge sptbr and sasid 2016-06-17 18:29:05 -07:00
multiplier.scala Remove unnecessary muxes in RV32 MulDiv 2016-05-25 14:27:02 -07:00
nbdcache.scala fix LRSC issue (RocketChip issue #86) 2016-07-26 18:41:52 -07:00
package.scala make mtvec configurable and writeable 2016-01-29 14:51:56 -08:00
ptw.scala Don't implicitly create Vecs, since they're heavyweight 2016-07-06 01:41:31 -07:00
rocc.scala Modify the RoCC interface to include status in the command queue. (#41) 2016-07-18 17:40:50 -07:00
rocket.scala Modify the RoCC interface to include status in the command queue. (#41) 2016-07-18 17:40:50 -07:00
tile.scala add clock override to tile constructor (#42) 2016-07-21 17:56:52 -07:00
tlb.scala Don't speculatively refill I$ in uncacheable regions 2016-07-09 01:10:58 -07:00
util.scala clean up WideCounter implementation 2016-07-15 00:51:01 -07:00