Megan Wachs
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d72abb7a12
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Debug: revert change to how flags are named
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2018-02-15 21:49:32 -08:00 |
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Megan Wachs
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c34b940d9a
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ElaborationArtefacts: revert unintentional change
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2018-02-15 14:23:54 -08:00 |
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Megan Wachs
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e0c3b22d61
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RegFieldDesc: same string used to insert/compare
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2018-02-15 14:23:27 -08:00 |
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Megan Wachs
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b95f68447f
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RegFieldDesc: Prevent different RegField JSONS from overwriting eachother.
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2018-02-15 14:01:47 -08:00 |
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Megan Wachs
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64d3731e45
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RegFieldDesc: don't put characters into names that need to be sanitized
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2018-02-15 13:25:06 -08:00 |
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Megan Wachs
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197699b93a
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Debug: don't need to fully populate flags array
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2018-02-15 13:23:51 -08:00 |
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Megan Wachs
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e2e678d53d
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Merge pull request #1183 from freechipsproject/regfield_descriptions
more detailed RegField descriptions
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2018-02-12 14:25:06 -08:00 |
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Megan Wachs
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6f70d25ef9
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Merge pull request #1184 from freechipsproject/regfield_json
TLRegMapper: emit a JSON file describing the register fields
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2018-02-12 12:00:01 -08:00 |
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Megan Wachs
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de91672e9a
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RegFieldDesc: simplify the output RegFieldDesc JSON to just a list of reg fields
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2018-02-12 08:32:52 -08:00 |
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Megan Wachs
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7bf0121f07
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PLIC: correct some descriptions
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2018-02-12 08:31:29 -08:00 |
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Megan Wachs
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08acbe1a29
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RegFieldDesc: Clean up both descriptions and JSON presentations
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2018-02-11 23:57:57 -08:00 |
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Megan Wachs
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5ab4204e8a
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RegField: the JSON will just leave things out of type None
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2018-02-11 22:51:36 -08:00 |
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Megan Wachs
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3b44f380d8
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TLRegMapper: emit a JSON file describing the register fields
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2018-02-11 22:51:36 -08:00 |
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Megan Wachs
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256f8ffc6b
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Clint: Annotate regmap with RegFieldDesc
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2018-02-11 21:33:09 -08:00 |
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Megan Wachs
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718c88a8f9
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PLIC: Annotate regmap with RegFieldDescs
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2018-02-11 21:05:17 -08:00 |
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Megan Wachs
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13b120fb01
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Debug: Annotate regmaps with RegFieldDescs
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2018-02-10 20:11:24 -08:00 |
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Megan Wachs
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7abf6e1c8a
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RegMapper: Update cover props to use new RegFieldDesc objects
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2018-02-10 13:17:38 -08:00 |
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Megan Wachs
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4ab1585a78
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Register Field: Add a more verbose description object
Add versions of the RegField functions to take it in, and
update Example device to use it.
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2018-02-10 13:17:18 -08:00 |
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Henry Cook
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1bfdfacda0
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Merge pull request #1234 from grebe/bindFixup
Use bind from global namespace
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2018-02-09 15:59:51 -08:00 |
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Paul Rigge
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ac62bf7f22
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Use bind from global namespace
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2018-02-09 14:16:20 -08:00 |
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Henry Cook
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9a56221566
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Merge pull request #1192 from seldridge/auto-plusargs
Automatic PlusArg for emulator.cc
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2018-02-08 18:29:31 -08:00 |
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Henry Cook
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fe277cf6f0
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Merge branch 'master' into auto-plusargs
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2018-02-06 18:38:44 -08:00 |
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Andrew Waterman
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9f6d586e8c
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Add PLIC covers (#1229)
* Add another FPU hazard cover
* Add some PLIC covers
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2018-02-06 17:33:33 -08:00 |
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Andrew Waterman
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36cba65e60
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Merge pull request #1228 from freechipsproject/no-mul
Teach MulDiv to do div-only
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2018-02-06 15:38:20 -08:00 |
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Andrew Waterman
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efc6c9cbd3
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Let user of CSRFile decide when to set tval
I also renamed badaddr to tval (the correct name).
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2018-02-06 14:05:03 -08:00 |
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Andrew Waterman
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a59fc3bdaa
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Teach MulDiv to do either mul-only or div-only by setting unroll=0
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2018-02-06 14:03:17 -08:00 |
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Andrew Waterman
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69441930b5
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Rationalize ALU function encoding
MULHSU and MULHU should match their ISA funct3 encodings to slightly
reduce HW cost.
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2018-02-06 14:00:37 -08:00 |
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Colin Schmidt
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c1eb795aba
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move sbt-launch to match project/build.properties (#1222)
therefore *everything* is now 1.0.4
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2018-02-02 17:13:05 -08:00 |
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Andrew Waterman
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e26363a176
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Don't pass deprecated -ffaaf option to firrtl (#1221)
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2018-02-01 14:46:38 -08:00 |
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Jack Koenig
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18e3bf3701
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Bump Firrtl (#1219)
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2018-01-31 14:31:54 -08:00 |
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solomatnikov
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5294523551
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Keep io.cpu.s1_data for visibility (#1218)
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2018-01-31 14:31:42 -08:00 |
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Henry Cook
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ad58b37437
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Merge pull request #1215 from freechipsproject/config-altermap
Misc updates to Config and Generator APIs
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2018-01-31 14:22:17 -08:00 |
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Henry Cook
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b1fa19e801
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bump hardfloat for scala 2.11.12 (#1216)
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2018-01-30 20:42:36 -08:00 |
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Henry Cook
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7dad486707
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util: updates to internal Generator API
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2018-01-30 15:19:37 -08:00 |
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Henry Cook
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bd50a1a4bc
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config: remove deprecated Parameters.root
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2018-01-30 11:52:44 -08:00 |
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Henry Cook
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46751bedeb
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config: MapParameters are back in style
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2018-01-30 11:52:44 -08:00 |
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Jacob Chang
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f4853c4f63
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Add cover properties to Core CSRs (#1212)
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2018-01-30 00:01:19 -08:00 |
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Andrew Waterman
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b5ff853e86
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Sign-extend the depc CSR (#1209)
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2018-01-26 12:07:33 -08:00 |
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Andrew Waterman
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8d8e4e1399
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Merge pull request #1196 from freechipsproject/interrupt-cover
Cover all exceptions and interrupts
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2018-01-25 18:06:13 -08:00 |
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Andrew Waterman
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d2399b6d0e
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Cover all exceptions and interrupts
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2018-01-25 16:14:56 -08:00 |
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Jacob Chang
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a749326deb
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Add cover points to registers (#1208)
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2018-01-24 21:37:24 -08:00 |
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Andrew Waterman
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94d2edceb9
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Merge pull request #1205 from freechipsproject/fpu-cover
Add some covers for VM and FPU
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2018-01-23 18:49:45 -08:00 |
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Andrew Waterman
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7a0252fdfc
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Add some covers for FPU structural hazards
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2018-01-23 16:32:03 -08:00 |
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Andrew Waterman
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a2ca82f92c
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Add VM covers
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2018-01-23 16:13:35 -08:00 |
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Jacob Chang
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dcda98dcaf
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Disable coverage collection for testbench related verilog files (#1204)
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2018-01-22 16:40:38 -08:00 |
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Wesley W. Terpstra
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c32150b994
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ResetCatchAndSync: work also in the context of a RawModule (#1202)
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2018-01-19 19:45:52 -08:00 |
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Wesley W. Terpstra
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f6f5606f8e
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diplomacy: run user instantiate() method after nodes are initialized (#1198)
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2018-01-18 14:57:47 -08:00 |
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Henry Cook
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5cc1411e14
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Merge pull request #1199 from freechipsproject/require-messages
rocket: add address to tlb permissions require msgs
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2018-01-18 14:53:25 -08:00 |
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Jack Koenig
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bf5dd6dac3
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Replace Parameters in cover with globally setable implementation (#1200)
This change is made in anticipation of a proper coverage library
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2018-01-18 14:45:36 -08:00 |
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Henry Cook
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24c1235500
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rocket: add address to tlb permissions require msgs
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2018-01-18 10:31:51 -08:00 |
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