Add cover properties to Core CSRs (#1212)
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@ -609,6 +609,11 @@ class CSRFile(perfEventSets: EventSets = new EventSets(Seq()))(implicit p: Param
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io.rw.rdata := Mux1H(for ((k, v) <- read_mapping) yield decoded_addr(k) -> v)
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// cover access to register
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read_mapping.foreach( {case (k, v) => {
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cover(io.rw.cmd.isOneOf(CSR.W, CSR.S, CSR.C, CSR.R) && io.rw.addr===k, "CSR_access_"+k.toString, "Cover Accessing Core CSR field")
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}})
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io.fcsr_rm := reg_frm
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when (io.fcsr_flags.valid) {
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reg_fflags := reg_fflags | io.fcsr_flags.bits
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