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Commit Graph

5525 Commits

Author SHA1 Message Date
cf7cd03d64 Merge pull request #1239 from freechipsproject/reduce_debug_flags
Reduce Debug Module "flags"
2018-02-16 08:53:41 -08:00
bb1976552f Merge pull request #1238 from freechipsproject/error-bifurcate
Error: don't be an exception wrt. caching
2018-02-15 22:19:27 -08:00
d72abb7a12 Debug: revert change to how flags are named 2018-02-15 21:49:32 -08:00
dcfbdabe60 CacheCork: better document edge conditions 2018-02-15 19:14:30 -08:00
ecd069dca4 tilelink: allow FIFO caches
Probably not a smart thing to build, but not illegal!
2018-02-15 19:09:37 -08:00
acecc407a5 HellaCache: we do NOT really support probe below the block size!
If we did, you would somehow have to retain ownership of the
unprobed parts of the block, in case they happened to be dirty.
2018-02-15 19:08:43 -08:00
c34b940d9a ElaborationArtefacts: revert unintentional change 2018-02-15 14:23:54 -08:00
e0c3b22d61 RegFieldDesc: same string used to insert/compare 2018-02-15 14:23:27 -08:00
b95f68447f RegFieldDesc: Prevent different RegField JSONS from overwriting eachother. 2018-02-15 14:01:47 -08:00
64d3731e45 RegFieldDesc: don't put characters into names that need to be sanitized 2018-02-15 13:25:06 -08:00
197699b93a Debug: don't need to fully populate flags array 2018-02-15 13:23:51 -08:00
fa412246b3 Error: don't be an exception wrt. caching
Prior to this PR, the error device was allowed to be cached by
multiple actors despite never probing any of them. This is a
pretty unusual set of properties that has caused us trouble
several times now in the past.

Let's instead put the Error device into one of two very well
established categories: a straight-up MMIO device or a tracked
memory region.
2018-02-14 23:02:55 -08:00
e2e678d53d Merge pull request #1183 from freechipsproject/regfield_descriptions
more detailed RegField descriptions
2018-02-12 14:25:06 -08:00
6f70d25ef9 Merge pull request #1184 from freechipsproject/regfield_json
TLRegMapper: emit a JSON file describing the register fields
2018-02-12 12:00:01 -08:00
de91672e9a RegFieldDesc: simplify the output RegFieldDesc JSON to just a list of reg fields 2018-02-12 08:32:52 -08:00
7bf0121f07 PLIC: correct some descriptions 2018-02-12 08:31:29 -08:00
08acbe1a29 RegFieldDesc: Clean up both descriptions and JSON presentations 2018-02-11 23:57:57 -08:00
5ab4204e8a RegField: the JSON will just leave things out of type None 2018-02-11 22:51:36 -08:00
3b44f380d8 TLRegMapper: emit a JSON file describing the register fields 2018-02-11 22:51:36 -08:00
256f8ffc6b Clint: Annotate regmap with RegFieldDesc 2018-02-11 21:33:09 -08:00
718c88a8f9 PLIC: Annotate regmap with RegFieldDescs 2018-02-11 21:05:17 -08:00
13b120fb01 Debug: Annotate regmaps with RegFieldDescs 2018-02-10 20:11:24 -08:00
7abf6e1c8a RegMapper: Update cover props to use new RegFieldDesc objects 2018-02-10 13:17:38 -08:00
4ab1585a78 Register Field: Add a more verbose description object
Add versions of the RegField functions to take it in, and
update Example device to use it.
2018-02-10 13:17:18 -08:00
1bfdfacda0 Merge pull request #1234 from grebe/bindFixup
Use bind from global namespace
2018-02-09 15:59:51 -08:00
ac62bf7f22 Use bind from global namespace 2018-02-09 14:16:20 -08:00
9a56221566 Merge pull request #1192 from seldridge/auto-plusargs
Automatic PlusArg for emulator.cc
2018-02-08 18:29:31 -08:00
fe277cf6f0 Merge branch 'master' into auto-plusargs 2018-02-06 18:38:44 -08:00
9f6d586e8c Add PLIC covers (#1229)
* Add another FPU hazard cover

* Add some PLIC covers
2018-02-06 17:33:33 -08:00
36cba65e60 Merge pull request #1228 from freechipsproject/no-mul
Teach MulDiv to do div-only
2018-02-06 15:38:20 -08:00
efc6c9cbd3 Let user of CSRFile decide when to set tval
I also renamed badaddr to tval (the correct name).
2018-02-06 14:05:03 -08:00
a59fc3bdaa Teach MulDiv to do either mul-only or div-only by setting unroll=0 2018-02-06 14:03:17 -08:00
69441930b5 Rationalize ALU function encoding
MULHSU and MULHU should match their ISA funct3 encodings to slightly
reduce HW cost.
2018-02-06 14:00:37 -08:00
c1eb795aba move sbt-launch to match project/build.properties (#1222)
therefore *everything* is now 1.0.4
2018-02-02 17:13:05 -08:00
e26363a176 Don't pass deprecated -ffaaf option to firrtl (#1221) 2018-02-01 14:46:38 -08:00
18e3bf3701 Bump Firrtl (#1219) 2018-01-31 14:31:54 -08:00
5294523551 Keep io.cpu.s1_data for visibility (#1218) 2018-01-31 14:31:42 -08:00
ad58b37437 Merge pull request #1215 from freechipsproject/config-altermap
Misc updates to Config and Generator APIs
2018-01-31 14:22:17 -08:00
b1fa19e801 bump hardfloat for scala 2.11.12 (#1216) 2018-01-30 20:42:36 -08:00
7dad486707 util: updates to internal Generator API 2018-01-30 15:19:37 -08:00
bd50a1a4bc config: remove deprecated Parameters.root 2018-01-30 11:52:44 -08:00
46751bedeb config: MapParameters are back in style 2018-01-30 11:52:44 -08:00
f4853c4f63 Add cover properties to Core CSRs (#1212) 2018-01-30 00:01:19 -08:00
b5ff853e86 Sign-extend the depc CSR (#1209) 2018-01-26 12:07:33 -08:00
8d8e4e1399 Merge pull request #1196 from freechipsproject/interrupt-cover
Cover all exceptions and interrupts
2018-01-25 18:06:13 -08:00
d2399b6d0e Cover all exceptions and interrupts 2018-01-25 16:14:56 -08:00
a749326deb Add cover points to registers (#1208) 2018-01-24 21:37:24 -08:00
94d2edceb9 Merge pull request #1205 from freechipsproject/fpu-cover
Add some covers for VM and FPU
2018-01-23 18:49:45 -08:00
7a0252fdfc Add some covers for FPU structural hazards 2018-01-23 16:32:03 -08:00
a2ca82f92c Add VM covers 2018-01-23 16:13:35 -08:00