Megan Wachs and Howard Mao
c31c650def
If NTiles == 1, only use MEI. Also Create configuration for ManagerToClientStatelessBridge.
2016-07-21 13:54:28 -07:00
Megan Wachs and Howard Mao
eb9e998c08
Add ManagerToClientStatelessBridge
2016-07-21 13:49:16 -07:00
Megan Wachs
407bc95c42
Rename MulDivUnroll to MulUnroll
2016-07-15 15:40:17 -07:00
Megan Wachs
4c26a6bc96
Create seperate Mul/Div paramters instead of UseFastMulDiv
2016-07-15 14:40:37 -07:00
mwachs5 and Andrew Waterman
36720d915a
Update README.md ( #161 )
...
Correct typo in heading
2016-07-11 00:34:13 -07:00
mwachs5 and Andrew Waterman
2d2096e509
Add smaller ROM/RAM for 32-bit debug ( #60 )
2016-06-15 15:07:43 -07:00
Megan Wachs and Andrew Waterman
cee0cf345e
[debug] Update Debug ROM contents to write F..F to RAM in case of exception
2016-06-09 14:05:30 -07:00
mwachs5 and Andrew Waterman
93c1b17b52
[debug] Remove erroneous buffer on SB read data ( #56 )
2016-06-08 23:31:13 -04:00
Megan Wachs and Andrew Waterman
b832689642
Correct Debug ROM contents
2016-06-05 19:35:25 -07:00
Megan Wachs and Andrew Waterman
605fb5b92f
[debug]: fix issue with subword select logic
2016-06-05 19:31:07 -07:00
Megan Wachs and Andrew Waterman
3e8322816b
Correct DMINFO Fields
2016-06-05 19:29:50 -07:00
Megan Wachs and Andrew Waterman
7e550ab07c
[debug] rocket: fix for issue 121, correct debug ROM and stall logic
2016-06-05 19:29:44 -07:00
mwachs5 and Andrew Waterman
740a6073f6
Add Debug Module ( #49 )
...
* Add Debug Module
* [debug] Remove unit tests, update System Bus register addresses, parameterize nComponents
* [debug] Update Debug ROM contents to match updated addresses
2016-06-01 16:33:33 -07:00
Megan WachsandHoward Mao
