[debug] rocket: fix for issue 121, correct debug ROM and stall logic
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@ -214,9 +214,13 @@ class DefaultDebugModuleConfig (val ncomponents : Int, val xlen:Int)
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extends DebugModuleConfig(
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nComponents = ncomponents,
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nDebugBusAddrSize = 5,
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// While smaller numbers are theoretically
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// possible as noted in the Spec,
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// the ROM image would need to be
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// adjusted accordingly.
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nDebugRamBytes = xlen match{
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case 32 => 28
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case 64 => 40
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case 32 => 64
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case 64 => 64
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case 128 => 64
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},
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debugRomContents = Some(DsbBusConsts.defaultRomContents),
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@ -888,8 +892,7 @@ class DebugModule ()(implicit val p:cde.Parameters)
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Acquire.getType, Acquire.getBlockType, Acquire.putType, Acquire.putBlockType
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).map(sbAcqReg.isBuiltInType _)
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val sbMultibeat = sbReg_getblk
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val sbMultibeat = sbReg_getblk & sbAcqValidReg;
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val sbBeatInc1 = sbAcqReg.addr_beat + UInt(1)
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