1
0
Commit Graph

5518 Commits

Author SHA1 Message Date
Megan Wachs
c34b940d9a
ElaborationArtefacts: revert unintentional change 2018-02-15 14:23:54 -08:00
Megan Wachs
e0c3b22d61
RegFieldDesc: same string used to insert/compare 2018-02-15 14:23:27 -08:00
Megan Wachs
b95f68447f RegFieldDesc: Prevent different RegField JSONS from overwriting eachother. 2018-02-15 14:01:47 -08:00
Megan Wachs
64d3731e45 RegFieldDesc: don't put characters into names that need to be sanitized 2018-02-15 13:25:06 -08:00
Megan Wachs
197699b93a Debug: don't need to fully populate flags array 2018-02-15 13:23:51 -08:00
Megan Wachs
e2e678d53d
Merge pull request #1183 from freechipsproject/regfield_descriptions
more detailed RegField descriptions
2018-02-12 14:25:06 -08:00
Megan Wachs
6f70d25ef9
Merge pull request #1184 from freechipsproject/regfield_json
TLRegMapper: emit a JSON file describing the register fields
2018-02-12 12:00:01 -08:00
Megan Wachs
de91672e9a RegFieldDesc: simplify the output RegFieldDesc JSON to just a list of reg fields 2018-02-12 08:32:52 -08:00
Megan Wachs
7bf0121f07 PLIC: correct some descriptions 2018-02-12 08:31:29 -08:00
Megan Wachs
08acbe1a29 RegFieldDesc: Clean up both descriptions and JSON presentations 2018-02-11 23:57:57 -08:00
Megan Wachs
5ab4204e8a RegField: the JSON will just leave things out of type None 2018-02-11 22:51:36 -08:00
Megan Wachs
3b44f380d8 TLRegMapper: emit a JSON file describing the register fields 2018-02-11 22:51:36 -08:00
Megan Wachs
256f8ffc6b Clint: Annotate regmap with RegFieldDesc 2018-02-11 21:33:09 -08:00
Megan Wachs
718c88a8f9 PLIC: Annotate regmap with RegFieldDescs 2018-02-11 21:05:17 -08:00
Megan Wachs
13b120fb01 Debug: Annotate regmaps with RegFieldDescs 2018-02-10 20:11:24 -08:00
Megan Wachs
7abf6e1c8a RegMapper: Update cover props to use new RegFieldDesc objects 2018-02-10 13:17:38 -08:00
Megan Wachs
4ab1585a78 Register Field: Add a more verbose description object
Add versions of the RegField functions to take it in, and
update Example device to use it.
2018-02-10 13:17:18 -08:00
Henry Cook
1bfdfacda0
Merge pull request #1234 from grebe/bindFixup
Use bind from global namespace
2018-02-09 15:59:51 -08:00
Paul Rigge
ac62bf7f22 Use bind from global namespace 2018-02-09 14:16:20 -08:00
Henry Cook
9a56221566
Merge pull request #1192 from seldridge/auto-plusargs
Automatic PlusArg for emulator.cc
2018-02-08 18:29:31 -08:00
Henry Cook
fe277cf6f0
Merge branch 'master' into auto-plusargs 2018-02-06 18:38:44 -08:00
Andrew Waterman
9f6d586e8c
Add PLIC covers (#1229)
* Add another FPU hazard cover

* Add some PLIC covers
2018-02-06 17:33:33 -08:00
Andrew Waterman
36cba65e60
Merge pull request #1228 from freechipsproject/no-mul
Teach MulDiv to do div-only
2018-02-06 15:38:20 -08:00
Andrew Waterman
efc6c9cbd3 Let user of CSRFile decide when to set tval
I also renamed badaddr to tval (the correct name).
2018-02-06 14:05:03 -08:00
Andrew Waterman
a59fc3bdaa Teach MulDiv to do either mul-only or div-only by setting unroll=0 2018-02-06 14:03:17 -08:00
Andrew Waterman
69441930b5 Rationalize ALU function encoding
MULHSU and MULHU should match their ISA funct3 encodings to slightly
reduce HW cost.
2018-02-06 14:00:37 -08:00
Colin Schmidt
c1eb795aba move sbt-launch to match project/build.properties (#1222)
therefore *everything* is now 1.0.4
2018-02-02 17:13:05 -08:00
Andrew Waterman
e26363a176
Don't pass deprecated -ffaaf option to firrtl (#1221) 2018-02-01 14:46:38 -08:00
Jack Koenig
18e3bf3701 Bump Firrtl (#1219) 2018-01-31 14:31:54 -08:00
solomatnikov
5294523551
Keep io.cpu.s1_data for visibility (#1218) 2018-01-31 14:31:42 -08:00
Henry Cook
ad58b37437
Merge pull request #1215 from freechipsproject/config-altermap
Misc updates to Config and Generator APIs
2018-01-31 14:22:17 -08:00
Henry Cook
b1fa19e801 bump hardfloat for scala 2.11.12 (#1216) 2018-01-30 20:42:36 -08:00
Henry Cook
7dad486707 util: updates to internal Generator API 2018-01-30 15:19:37 -08:00
Henry Cook
bd50a1a4bc config: remove deprecated Parameters.root 2018-01-30 11:52:44 -08:00
Henry Cook
46751bedeb config: MapParameters are back in style 2018-01-30 11:52:44 -08:00
Jacob Chang
f4853c4f63
Add cover properties to Core CSRs (#1212) 2018-01-30 00:01:19 -08:00
Andrew Waterman
b5ff853e86
Sign-extend the depc CSR (#1209) 2018-01-26 12:07:33 -08:00
Andrew Waterman
8d8e4e1399
Merge pull request #1196 from freechipsproject/interrupt-cover
Cover all exceptions and interrupts
2018-01-25 18:06:13 -08:00
Andrew Waterman
d2399b6d0e Cover all exceptions and interrupts 2018-01-25 16:14:56 -08:00
Jacob Chang
a749326deb
Add cover points to registers (#1208) 2018-01-24 21:37:24 -08:00
Andrew Waterman
94d2edceb9
Merge pull request #1205 from freechipsproject/fpu-cover
Add some covers for VM and FPU
2018-01-23 18:49:45 -08:00
Andrew Waterman
7a0252fdfc Add some covers for FPU structural hazards 2018-01-23 16:32:03 -08:00
Andrew Waterman
a2ca82f92c Add VM covers 2018-01-23 16:13:35 -08:00
Jacob Chang
dcda98dcaf
Disable coverage collection for testbench related verilog files (#1204) 2018-01-22 16:40:38 -08:00
Wesley W. Terpstra
c32150b994
ResetCatchAndSync: work also in the context of a RawModule (#1202) 2018-01-19 19:45:52 -08:00
Wesley W. Terpstra
f6f5606f8e
diplomacy: run user instantiate() method after nodes are initialized (#1198) 2018-01-18 14:57:47 -08:00
Henry Cook
5cc1411e14
Merge pull request #1199 from freechipsproject/require-messages
rocket: add address to tlb permissions require msgs
2018-01-18 14:53:25 -08:00
Jack Koenig
bf5dd6dac3
Replace Parameters in cover with globally setable implementation (#1200)
This change is made in anticipation of a proper coverage library
2018-01-18 14:45:36 -08:00
Henry Cook
24c1235500 rocket: add address to tlb permissions require msgs 2018-01-18 10:31:51 -08:00
Wesley W. Terpstra
5854fb5f7c
SourceShrinker improvements (#1197)
* SourceShrinker: preserve FIFO guarantees of slaves

* tilelink: document that Releases can use TtoT, BtoB, and NtoN

TtoT is needed for write-through caches.
2018-01-17 18:02:19 -08:00