Palmer Dabbelt and GitHub
9441c29d92
Merge pull request #1096 from freechipsproject/tools
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Bump riscv-tools, for a new toolchain release
2017-11-08 17:20:28 -08:00
Palmer Dabbelt
8700728a35
Bump riscv-tools, for a new toolchain release
2017-11-08 14:26:55 -08:00
Palmer Dabbelt and GitHub
6d1d285464
Merge pull request #933 from freechipsproject/cinst
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Print out the compressed instruction when executing one
2017-08-07 21:40:10 -07:00
Palmer Dabbelt and GitHub
cc1e2af336
Merge pull request #934 from freechipsproject/critical-paths
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Revert "Remove one gate from D$ ECC check"
2017-08-07 19:41:08 -07:00
Palmer Dabbelt
fc0d5fcf98
Print out the compressed instruction when executing one
2017-08-07 17:21:53 -07:00
Palmer Dabbelt and Wesley W. Terpstra
23706113c2
Bump riscv-tools, to get some -mcmodel=medany fixes ( #739 )
2017-05-11 21:04:32 -07:00
Palmer Dabbelt and GitHub
19db0389b6
Merge pull request #732 from ucb-bar/vectored-stvec
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Support vectored stvec interrupts, too
2017-05-09 09:34:47 -07:00
Palmer Dabbelt
dab96096b4
Add firrtl build dependencies
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Without this when I update firrtl the new version doesn't get built, so
my build is constantly failing.
2016-08-05 14:45:00 -07:00
Palmer Dabbelt and Andrew Waterman
25ade44fe3
Don't build the Verilator man pages ( #141 )
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These failed for Andrew earlier. While it might be paranioa, there's
really no reason to build the man pages so we might as well not bother.
2016-06-16 10:13:21 -07:00
Palmer Dabbelt and Andrew Waterman
82cef6fa7b
Make a TileLink to Smi converter availiable to users ( #136 )
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See the cooresponding uncore commit for details.
2016-06-10 18:49:17 -07:00
Palmer Dabbelt and Andrew Waterman
0c695d8e83
Use the new TileLink to Smi converter ( #10 )
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I pulled out the TileLink to Smi converter and put it in uncore so I can
use it for my own stuff.
2016-06-10 14:04:48 -07:00
Palmer Dabbelt and Andrew Waterman
e5cfc2dac1
Add a Smi to TileLink converter ( #59 )
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I'm trying to get someone to attach their stuff to Rocket Chip for the
upcoming tapout. TileLink sounded too complicated, but Smi went over
well. Since the mmioNetwork in Rocket Chip is based on TileLink, it
seemed like the easiest thing to do was to write a TileLink to Smi
converter so people could use it.
It turns out there was already one inside the groundtest unit tests, so
I just moved that into uncore (it was inlined into a test case so you
couldn't actually use it before). Internally the converter uses Nasti,
but I figured that's good enough for now.
2016-06-10 14:04:28 -07:00
Palmer Dabbelt
7c33d88861
Merge pull request #90 from ucb-bar/elaborate-once
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Bump Chisel3, to elaborate circuits once
2016-04-18 21:04:55 -07:00
Palmer Dabbelt
85c86994a0
Bump Chisel3, to elaborate circuits once
2016-04-18 14:54:17 -07:00
Palmer Dabbelt
7d5eac189b
Bump the uncore for some Chisel3 fixes
2016-03-24 12:00:13 -07:00
Palmer Dabbelt
c6e974b110
Merge pull request #30 from ucb-bar/chisel3
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Chisel 3 support
2016-03-24 11:52:02 -07:00
Palmer Dabbelt
7fa38b5624
Merge pull request #68 from ucb-bar/test-and-fix-backup-mem
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Fix the backup memory port
2016-02-27 12:19:55 -08:00
Palmer Dabbelt
90a73c621d
Merge pull request #58 from ucb-bar/more-travis-fixing
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More travis fixing
2016-02-23 21:26:16 -08:00
Palmer Dabbelt
700d756de0
Merge pull request #55 from ucb-bar/travis-regression
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travis-ci.org improvements
2016-02-23 12:19:59 -08:00
Palmer Dabbelt
0ac5c07683
Merge pull request #54 from ucb-bar/fsim-no-htif
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The FPGA doesn't have an HTIF clock divider
2016-02-22 20:02:03 -08:00
Palmer Dabbelt
96b77f399c
Merge pull request #43 from ucb-bar/chisel3
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Bump junctions, for a chisel3 fix
2016-02-08 14:42:06 -08:00
Palmer Dabbelt
97640f099d
Merge pull request #41 from ucb-bar/regressions
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Support torture regressions
2016-02-01 18:39:28 -08:00
Palmer DabbeltandGitHub
