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Merge pull request #54 from ucb-bar/fsim-no-htif

The FPGA doesn't have an HTIF clock divider
This commit is contained in:
Palmer Dabbelt 2016-02-22 20:02:03 -08:00
commit 0ac5c07683

View File

@ -24,7 +24,11 @@ class htif_emulator_t : public htif_pthread_t
void set_clock_divisor(int divisor, int hold_cycles)
{
#ifdef UNCORE_SCR__HTIF_IO_CLOCK_DIVISOR
/* We only want to write the HTIF clock divisor SCR on targets where it
* actually exists (there isn't one on the FPGA, for example). */
write_cr(-1, UNCORE_SCR__HTIF_IO_CLOCK_DIVISOR, divisor | hold_cycles << 16);
#endif
}
void start()