Wesley W. Terpstra
41705808dd
Bus: remove deprecated crossing attach methods
2017-10-28 11:34:16 -07:00
Wesley W. Terpstra
eeb11a2693
coreplex: eliminate dead code
2017-10-27 01:13:35 -07:00
Wesley W. Terpstra
e12bdfdf9b
coreplex: attach example external interrupts ( #1076 )
...
Fixes #1071
2017-10-27 01:12:42 -07:00
Wesley W. Terpstra
13981379c4
CoreplexClockCrossing: add a helper method to decide if a clock is useul ( #1074 )
2017-10-26 23:39:56 -07:00
Wesley W. Terpstra
1d8e539362
coreplex: confirm crossings actually cross the right boundary
2017-10-26 15:53:01 -07:00
Wesley W. Terpstra
9e33ccdb05
rocket: clarify intent of boundaryBuffers and move to RocketTile
2017-10-26 13:58:52 -07:00
Wesley W. Terpstra
380cc6f03b
axi4: now also supports the island pattern
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
05d48d1807
TLBuffer: replace TLBufferChain with TLBuffer.chain
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
ce2b904b19
coreplex: tidy up interrupt crossings
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
e30906589f
coreplex: refactor crossings to use node pattern
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
8c5e8dd071
coreplex: leverage improved := composition
2017-10-26 13:04:32 -07:00
Henry Cook
b48ab985d0
coreplex: RocketTileWrapper now HasCrossingHelper
2017-10-26 13:04:32 -07:00
Henry Cook
9fe35382ea
sbus: tile adapters in sbus scope
2017-10-26 13:04:32 -07:00
Henry Cook
95a2e6ef27
coreplex: improve tile attachment adapters
2017-10-26 13:04:32 -07:00
Wesley W. Terpstra
2175758050
interrupts: implement in crossing wrapper
2017-10-26 13:04:29 -07:00
Wesley W. Terpstra
c6f95570df
IntNodes: moved from tilelink to their own package
2017-10-25 16:56:51 -07:00
Wesley W. Terpstra
6bc9c9fc6c
coreplex: add a crossing wrapper to generalize the island pattern
2017-10-25 16:56:50 -07:00
Wesley W. Terpstra
82b1aa8116
coreplex: print the A first to look nicer
2017-10-18 16:52:35 -07:00
Wesley W. Terpstra
a1ac23d7ec
coreplex: continue to print the device name in the address map
2017-10-18 16:44:53 -07:00
Richard Xia
5a951799aa
Add atomics support to DTS JSON file.
2017-10-18 15:17:53 -07:00
Wesley W. Terpstra
8b58327fa4
axi4: conversion from TL does not need beatBytes ( #1051 )
...
We used to pack the addr_lo into user bits. We don't do that anymore.
There is thus no need to waste those bits, nor to pass that arg.
2017-10-12 16:41:54 -07:00
Henry Cook
b64609bfe8
Merge pull request #1039 from freechipsproject/tile-crossing-params
...
Improvements wrt connecting RocketTiles to SystemBus
2017-10-11 17:12:03 -07:00
Megan Wachs
7b4c48d005
Correctly hook up the Local Interrupts into the Coreplex. Name some IntXBars
2017-10-11 15:10:50 -07:00
Henry Cook
60934ac622
coreplex: TilePortParams use BasicBusBlockers
2017-10-11 13:36:46 -07:00
Henry Cook
1240cb275c
coreplex: TilePortParams formatting
2017-10-11 00:29:11 -07:00
Henry Cook
37406706b4
coreplex: move CacheCork in front of SBus
...
Continue to not allow caches to cache ROMs.
Update TinyConfig and WithStatelessBridge.
2017-10-10 16:24:32 -07:00
Henry Cook
8f5f80f958
coreplex: TileSlavePortParams inject adapters into PBus
2017-10-10 15:25:08 -07:00
Henry Cook
660355004e
coreplex: TileMasterPortParams inject adapters into SBus
2017-10-10 15:02:50 -07:00
Henry Cook
9026646459
coreplex: first cut at using RocketCrossingParams
2017-10-10 12:02:04 -07:00
Andrew Waterman
36c39d01e4
Factor out most of HasRocketTiles into HasTiles
2017-10-07 17:36:24 -07:00
Andrew Waterman
70a4127cb8
Factor out some of HaveRocketTiles into HaveTiles
2017-10-07 17:36:24 -07:00
Andrew Waterman
71205b70cc
Make RocketTileWrapper a BaseTile
2017-10-07 17:36:24 -07:00
Henry Cook
8da7aabd51
tile: supply hartid from RocketTileParams
...
make WithNCores partial configs override rather than append more tiles
2017-10-05 00:31:53 -07:00
Henry Cook
45581e60f0
Revert "Merge pull request #1027 from freechipsproject/dont-touch-hartid"
...
This reverts commit 5232a29d7d
, reversing
changes made to a2dc13669a
.
2017-10-05 00:26:44 -07:00
Andrew Waterman
32fda51a2c
Get rid of paddrBits from SystemBus ( #1029 )
2017-10-04 12:11:37 -07:00
Henry Cook
cedfb0e784
coreplex: dontTouch the rocket_tile_inputs wire
...
which contains hartid.
2017-10-02 19:36:10 -07:00
Wesley W. Terpstra
0a287df0f7
Merge remote-tracking branch 'origin/master' into auto-diplomacy-bundles
2017-09-27 16:28:10 -07:00
Wesley W. Terpstra
9307092d14
coreplex: draw the FrontBus at the bottom and SystemBus at the top
2017-09-27 14:20:39 -07:00
Wesley W. Terpstra
e07d86aecd
rocket: flip interrupt rendering so cores are on top
2017-09-27 12:46:29 -07:00
Wesley W. Terpstra
1fda05970a
rocket: move interrupt synchronizers to correct side of crossing
2017-09-27 12:33:08 -07:00
Wesley W. Terpstra
0268959c24
rocket: move interrupt synchronizers to correct side of crossing
2017-09-27 12:02:04 -07:00
Wesley W. Terpstra
5af08966d8
coreplex: fix WithoutTLMonitors
...
closes #1017
2017-09-27 00:57:18 -07:00
Wesley W. Terpstra
31a934bec0
coreplex: buses are now LazyModules with LazyScope
2017-09-26 14:58:56 -07:00
Wesley W. Terpstra
a27e853101
diplomacy: move rendering properties to edges
...
FlipRendering { implicit p => ... } now changes the render direction of edges.
diplomatic NodeImps can specify a default render flip using the new 'render' method.
2017-09-26 13:24:36 -07:00
Henry Cook
9d5e96672e
coreplex: clean up coherence manager attachment point
2017-09-25 18:07:51 -07:00
Wesley W. Terpstra
b9a2e4c243
diplomacy: API beautification
2017-09-22 15:01:42 -07:00
Wesley W. Terpstra
9217baf9d4
diplomacy: change API to auto-create node bundles => cross-module refs
2017-09-22 15:01:39 -07:00
Wesley W. Terpstra
17ba209ed0
coreplex: name LazyModules
2017-09-22 14:38:47 -07:00
Andrew Waterman
afad25fceb
Integrate L1 BusErrorUnit
2017-09-20 00:05:07 -07:00
Henry Cook
56dae946b6
coreplex: MemoryBusParams.beatBytes also based on XLen
2017-09-13 11:25:42 -07:00