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Author	SHA1	Message	Date
Andrew Waterman	09468a272b	Add option to remove basic counters (mcycle/minstret)	2017-10-03 17:34:18 -07:00
Andrew Waterman	ab0821f25b	Move microarchitecture-neutral params from Rocket to Core ... This makes some of the units more reusable.	2017-10-03 17:34:18 -07:00
Andrew Waterman	190d5c50d9	Remove deprecated custom-CSR support	2017-10-03 17:34:18 -07:00
Henry Cook	5232a29d7d	Merge pull request #1027 from freechipsproject/dont-touch-hartid ... Make use of the new DontTouch annotation	2017-10-03 12:55:34 -07:00
Henry Cook	d33737802a	util: add DontTouch trait with dontTouchPorts method	2017-10-02 19:36:34 -07:00
Henry Cook	aa3a18222c	HellaCache: users like to peep resp.data and resp.addr	2017-10-02 19:36:30 -07:00
Henry Cook	cedfb0e784	coreplex: dontTouch the rocket_tile_inputs wire ... which contains hartid.	2017-10-02 19:36:10 -07:00
Wesley W. Terpstra	a2dc13669a	Error grants (#1025) ... * CacheCork: an error Grant still says 'toT' even though it is transient Grants with errors must be handled by a client as though no actual permissions were obtained, so that two clients do not both end up believing that they own a block which is only temporarily offline. However, the Grant MESSAGE should still match the request; ie. if you did Acquire.NtoT, the response must be Grant.toT, even though the 'error' bit signals that the Grant actually grants no permissions. This keeps the implementation of request-response tracking in interstitial adapters and FSMs simple, consistent with the way multibeat errors must include all their beats. * Error: handle permissions properly	2017-10-02 14:49:25 -07:00
Megan Wachs	9c9cb68462	JTAG Coverage: Add reset coverage points	2017-10-02 11:08:13 -07:00
Megan Wachs	a8ab06d572	JTAG: Add coverage points to the JTAG Tap	2017-10-02 11:08:13 -07:00
Jack Koenig	723af5e6b6	Merge pull request #971 from freechipsproject/bump-chisel-firrtl ... Bump chisel3 and firrtl, update plugin versions	2017-09-29 17:24:12 -07:00
Jack Koenig	8891bf1b64	Bump chisel3 and firrtl, update plugin versions ... And update chisel3 code	2017-09-29 15:44:27 -07:00
Henry Cook	547bdc2b5b	diplomacy: standardize sram device resource naming (#1022)	2017-09-29 14:52:26 -07:00
Andrew Waterman	9137f54f59	Merge pull request #1020 from freechipsproject/fix-trace-insn ... Provide correct trace insn on interrupts when possible	2017-09-27 18:47:24 -07:00
Wesley W. Terpstra	e315a7aaa7	Merge pull request #993 from freechipsproject/auto-diplomacy-bundles ... Auto diplomacy bundles	2017-09-27 17:39:53 -07:00
Andrew Waterman	9eaf50762e	Don't report exceptions as valid instructions in the printed log	2017-09-27 16:29:42 -07:00
Wesley W. Terpstra	0a287df0f7	Merge remote-tracking branch 'origin/master' into auto-diplomacy-bundles	2017-09-27 16:28:10 -07:00
Andrew Waterman	31c5246446	Provide correct trace insn on interrupts when possible	2017-09-27 16:27:53 -07:00
Henry Cook	33b46af806	Merge pull request #1007 from freechipsproject/tl-error ... Tl error	2017-09-27 16:22:32 -07:00
Wesley W. Terpstra	feae216f05	clint: output interrupts in the correct direction	2017-09-27 15:18:42 -07:00
Henry Cook	05112b49a3	Merge branch 'master' into tl-error	2017-09-27 14:50:17 -07:00
Henry Cook	652d57291c	Merge pull request #1018 from freechipsproject/refine-trace-port ... Separate interrupt bit from cause field in trace bundle	2017-09-27 14:46:27 -07:00
Henry Cook	5d08b37dab	Merge pull request #1019 from freechipsproject/move-rocket-int-sync ... Move rocket output interrupt syncronizers	2017-09-27 14:46:02 -07:00
Wesley W. Terpstra	9307092d14	coreplex: draw the FrontBus at the bottom and SystemBus at the top	2017-09-27 14:20:39 -07:00
Henry Cook	f48bf2ac2f	rocket: connect uncrossed output interrupts	2017-09-27 12:53:19 -07:00
Andrew Waterman	78f3877e02	Trace tval field should be zero when not taking exceptions	2017-09-27 12:51:10 -07:00
Wesley W. Terpstra	e07d86aecd	rocket: flip interrupt rendering so cores are on top	2017-09-27 12:46:29 -07:00
Andrew Waterman	583adeee88	Separate interrupt bit from cause field in trace bundle	2017-09-27 12:41:30 -07:00
Wesley W. Terpstra	1fda05970a	rocket: move interrupt synchronizers to correct side of crossing	2017-09-27 12:33:08 -07:00
Wesley W. Terpstra	ce01ab2700	RegisterRouter: correctly create interrupts vector	2017-09-27 12:27:16 -07:00
Wesley W. Terpstra	0268959c24	rocket: move interrupt synchronizers to correct side of crossing	2017-09-27 12:02:04 -07:00
Wesley W. Terpstra	e35d3df6ea	diplomacy: detect and report cycles in the diplomatic graph	2017-09-27 11:46:06 -07:00
Wesley W. Terpstra	5af08966d8	coreplex: fix WithoutTLMonitors ... closes #1017	2017-09-27 00:57:18 -07:00
Wesley W. Terpstra	d87536ff8b	diplomacy: make NodeHandle recursively composable	2017-09-26 18:47:16 -07:00
Wesley W. Terpstra	31a934bec0	coreplex: buses are now LazyModules with LazyScope	2017-09-26 14:58:56 -07:00
Wesley W. Terpstra	da40573a64	diplomacy: replace LazyModule.stack with an optional scope	2017-09-26 14:56:50 -07:00
Wesley W. Terpstra	a2b423d647	diplomacy: add LazyScope to post-hoc add children to a LazyModule	2017-09-26 14:40:45 -07:00
Wesley W. Terpstra	a27e853101	diplomacy: move rendering properties to edges ... FlipRendering { implicit p => ... } now changes the render direction of edges. diplomatic NodeImps can specify a default render flip using the new 'render' method.	2017-09-26 13:24:36 -07:00
Wesley W. Terpstra	76c2aa1661	diplomacy: introduce the typing-saving SimpleNodeImp	2017-09-26 12:28:59 -07:00
Wesley W. Terpstra	870ed3d219	diplomacy: fix the order of auto signals	2017-09-26 11:56:55 -07:00
Wesley W. Terpstra	d22ec1eddf	diplomacy: beautify node signal prefixes	2017-09-26 11:56:53 -07:00
Henry Cook	45d26ea130	Merge pull request #1015 from freechipsproject/coherence-manager ... coreplex: clean up coherence manager attachment point	2017-09-26 11:09:48 -07:00
Henry Cook	9d5e96672e	coreplex: clean up coherence manager attachment point	2017-09-25 18:07:51 -07:00
Wesley W. Terpstra	0111213bea	ValName: trim whitespace from symbol names	2017-09-25 17:47:40 -07:00
Wesley W. Terpstra	fef5054cec	diplomacy: disambiguate names only when necessary ... If two (or more) 'auto_' things have the same name, append _0 and _1 to them. The order of definitions is unaffected; ie: a => a_0 b => b_0 b => b_1 c => c a => a_1	2017-09-25 16:12:34 -07:00
pbing	a86a9c5564	Fix omitted parameter (#1014)	2017-09-25 14:11:28 -07:00
Wesley W. Terpstra	5323cf88dd	util: add Option.unzip	2017-09-25 12:06:31 -07:00
Wesley W. Terpstra	60614055e3	diplomacy: eliminate some wasted IdentityNodes using cross-module refs	2017-09-25 12:06:27 -07:00
Wesley W. Terpstra	bc225a4e82	diplomacy: place Monitors inside LazyModules sinks ... We used to place Monitors at the point of the ':='. This was problematic because the clock domain might be wrong. Thus, we needed to shove Monitors a lot. Furthermore, now that we have cross-module ':=', you might not even have access to the wires at the point where ':=' is invoked.	2017-09-22 23:36:17 -07:00
Wesley W. Terpstra	cfb7f13408	diplomacy: capture SourceInfo at point of := in Edge parameters	2017-09-22 22:25:56 -07:00