Yunsup Lee
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25fdf9827f
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push tests
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2013-11-21 14:45:59 -08:00 |
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Yunsup Lee
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5642194834
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push hwacha to consistent state
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2013-11-20 16:44:33 -08:00 |
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Stephen Twigg
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3eafbbd1e2
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Push hwacha, rocket. All physical tests pass.
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2013-11-19 22:16:27 -08:00 |
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Yunsup Lee
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8304a47919
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Merge branch 'hwacha' of github.com:ucb-bar/reference-chip into hwacha
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2013-11-19 18:02:13 -08:00 |
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Yunsup Lee
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c06299c963
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push tests
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2013-11-19 18:01:59 -08:00 |
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Stephen Twigg
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d7c6824c51
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Push riscv-tests and riscv-tools
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2013-11-18 13:30:02 -08:00 |
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Stephen Twigg
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e50c5180cd
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Merge branch 'master' into hwacha
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2013-11-14 16:03:55 -08:00 |
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Stephen Twigg
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36e715a797
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Use newer version of hwacha (still not quite working but no longer stalls)
|
2013-11-14 15:56:51 -08:00 |
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Stephen Twigg
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a870f51300
|
Add some vector tests
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2013-11-14 15:56:25 -08:00 |
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Ben Keller
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c137cf1a46
|
Added line to fix race condition in sbt compile; fixed .gitignores
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2013-11-08 15:30:08 -08:00 |
|
Yunsup Lee
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bb64c90092
|
forgot to put htif into uncore package
|
2013-11-07 15:42:21 -08:00 |
|
Yunsup Lee
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1d6d4b4e96
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move htif to uncore
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2013-11-07 13:19:19 -08:00 |
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Yunsup Lee
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ad1d8f219e
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push riscv-tools
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2013-11-05 21:10:49 -08:00 |
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Yunsup Lee
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c810847761
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hookup all memory ports
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2013-11-05 17:12:25 -08:00 |
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Stephen Twigg
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3cdfde9861
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Push hwacha, rocket
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2013-11-05 15:31:59 -08:00 |
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Stephen Twigg
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7da65434ee
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Initial commit for the hwacha reference-chip/rocket re-integration.
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2013-10-30 20:44:02 -07:00 |
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Yunsup Lee
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04108270ff
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push riscv-tools
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2013-10-29 22:54:00 -07:00 |
|
Andrew Waterman
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a875233be6
|
update subrepos
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2013-10-29 21:17:07 -07:00 |
|
Andrew Waterman
|
3c1d1f7981
|
Fix(?) SBT race by defining subproject build order
|
2013-10-29 13:27:36 -07:00 |
|
Andrew Waterman
|
8c380a7c3a
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Abort "make run" when tests fail
|
2013-10-29 13:25:57 -07:00 |
|
Andrew Waterman
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c55eee7244
|
Pass target machine exit code back to host OS
|
2013-10-29 13:24:09 -07:00 |
|
Stephen Twigg
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437f7ed4af
|
Push hardfloat (ignore target files)
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2013-09-26 20:51:19 -07:00 |
|
Henry Cook
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fc9c676fc1
|
add chisel and hardfloat back as sub-projects, bump other sub-projects
|
2013-09-26 12:01:46 -07:00 |
|
Stephen Twigg
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f6d7e22c46
|
Push rocket (fix issue with uppermost bit of D$ req tag getting lost)
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2013-09-25 11:52:01 -07:00 |
|
Stephen Twigg
|
36dfff5ee8
|
Adjust Verilog testbench to use new debug_stats_pcr signal that has been exported to the top level. It is the or-reduction of the stats pcr for each core. Push rocket (export stats pcr to top level). This scheme is cleaner than digging into the hierarchy.
|
2013-09-25 01:21:41 -07:00 |
|
Stephen Twigg
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eb7e6f03b3
|
push rocket (AccumulatorExample fixes and documentation)
|
2013-09-24 16:33:32 -07:00 |
|
Stephen Twigg
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472b947fbe
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push rocket (add option to RocketConfiguration, vm, to turn off virtualk memory)
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2013-09-24 16:16:12 -07:00 |
|
Stephen Twigg
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eb03f61058
|
Properly ignore target files. Push uncore (properly ignore target files)
|
2013-09-24 16:03:28 -07:00 |
|
Stephen Twigg
|
081fcc4e63
|
push rocket (accelerator interface fixes)
|
2013-09-24 10:55:22 -07:00 |
|
Stephen Twigg
|
fba0ae0fec
|
Push rocket
|
2013-09-23 00:26:27 -07:00 |
|
Stephen Twigg
|
324a6321bd
|
Push tools (improve consistency: these tools will compile/test the new ISA encoding)
|
2013-09-22 03:24:11 -07:00 |
|
Stephen Twigg
|
2676ea8279
|
Push rocket (fix some issues with RoCC although some remain)
|
2013-09-22 03:19:43 -07:00 |
|
Andrew Waterman
|
b7d7ced41b
|
Update to new ISA
|
2013-09-21 06:40:23 -07:00 |
|
Huy Vo
|
09247c0e0b
|
fix to sram init pins
|
2013-09-19 20:12:10 -07:00 |
|
Andrew Waterman
|
42970c9a99
|
Update Rocket
|
2013-09-15 04:39:52 -07:00 |
|
Andrew Waterman
|
628745226c
|
Use spike disassembler riscv-dis if it exists
|
2013-09-15 04:25:53 -07:00 |
|
Andrew Waterman
|
80003b3019
|
Support RoCC
|
2013-09-15 04:25:26 -07:00 |
|
Andrew Waterman
|
fbdbb01232
|
update to new isa; disable vector tests
|
2013-09-12 17:04:03 -07:00 |
|
Henry Cook
|
b42e140e05
|
NetworkIOs no longer use thunks
|
2013-09-10 16:23:52 -07:00 |
|
Stephen Twigg
|
6cde69e95d
|
Merge changes from master. This updates rocket more than it should so while the emulator builds, programs will not execute correctly due to ISA changes, etc.
|
2013-09-09 14:31:18 -07:00 |
|
Stephen Twigg
|
f27c0fb010
|
Merge commit '2bd4a66eee572252ba6250f9bddada51657fc379' into chisel-v2
|
2013-09-05 15:01:56 -07:00 |
|
Stephen Twigg
|
69daae0dae
|
Add dependency resolvers to build.scala to fix build script
|
2013-09-05 14:56:41 -07:00 |
|
Yunsup Lee
|
2c47b4388a
|
push rocket
|
2013-08-26 14:54:49 -07:00 |
|
Yunsup Lee
|
9003bc2614
|
push rocket
|
2013-08-24 22:42:57 -07:00 |
|
Yunsup Lee
|
d0674af13f
|
forgot to push riscv-rocket
|
2013-08-24 22:15:38 -07:00 |
|
Yunsup Lee
|
ba9bbc27df
|
apply same change to fpga top-level
|
2013-08-24 15:50:03 -07:00 |
|
Yunsup Lee
|
76cd90fc01
|
parameterize number of SCRs
|
2013-08-24 15:47:42 -07:00 |
|
Yunsup Lee
|
694ebd65cf
|
push uncore
|
2013-08-24 15:24:25 -07:00 |
|
Yunsup Lee
|
0884bc9789
|
fix DRAMSideLLCNull entries
|
2013-08-24 13:20:38 -07:00 |
|
Yunsup Lee
|
1e3ac0afa9
|
back to NTILES=1
|
2013-08-24 13:10:30 -07:00 |
|