Logo
Explore Help
Sign In
riscv/fpga-shells
Watch 1
Star 0 Fork 0
Code Releases Activity
37 Commits 2 Branches 0 Tags
9c38f20333aee53645ed7a8ba8b26e92ad930c25
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
Wesley W. Terpstra 9c38f20333 vc707 axi: move addresses to line up with ChipLink
2018-02-08 07:21:44 -08:00
src/main/scala
vc707 axi: move addresses to line up with ChipLink
2018-02-08 07:21:44 -08:00
xilinx
VC707 JTAG support throught XM105 FMC or reuse of LCD header
2018-02-08 07:21:44 -08:00
.gitignore
Initial commit for fpga-shells
2017-08-16 11:23:45 -07:00
S
Description
Freedom FPGA mappings (https://github.com/sifive/fpga-shells)
682 KiB
0 Stars 1 Watchers 0 Forks
Languages
Scala 89.5%
Tcl 7.8%
Verilog 2%
Makefile 0.7%
Powered by Gitea Version: 28.2.0 Page: 13ms Template: 3ms
Dark
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API