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RISC-V Linux-Workstation auf dem ML507
8 Commits 1 Branch 1 Tag 332 KiB
Verilog 37%
VHDL 36%
Diff 27%
dfd2d2ac9b
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Klemens Schölhorn dfd2d2ac9b Use new ise virtex-6 parser and set SYNTHESIS verilog constant
2018-06-05 16:10:42 +02:00
freedom@2c74ef7f03 Import freedom repos as submodules 2018-06-05 15:11:52 +02:00
freedom-u-sdk@0e61cba991 Import freedom repos as submodules 2018-06-05 15:11:52 +02:00
project/ise Use new ise virtex-6 parser and set SYNTHESIS verilog constant 2018-06-05 16:10:42 +02:00
src Import main constraints file 2018-06-05 16:04:27 +02:00
.gitmodules Import terminal as a submodule 2018-06-05 15:33:43 +02:00