terminal/main.vhd

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VHDL
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity main is
port (
clk: in std_logic;
dvi_d: out std_logic_vector(11 downto 0);
dvi_clk_p: out std_logic;
dvi_clk_n: out std_logic;
dvi_hsync: out std_logic;
dvi_vsync: out std_logic;
dvi_de: out std_logic;
dvi_reset: out std_logic;
i2c_scl: inout std_logic;
i2c_sda: inout std_logic;
ps2_scl: inout std_logic;
ps2_sda: inout std_logic;
switch_center: in std_logic;
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rotary_up: in std_logic;
rotary_down: in std_logic;
rotary_push: in std_logic;
led: out std_logic_vector(7 downto 0)
);
end main;
architecture syn of main is
constant clk_vga_f: integer := 48_000_000;
signal clk_vga: std_logic;
signal reset: std_logic;
begin
reset <= switch_center;
-- convert the 100MHz to a 48MHz pixel clock
clock_source: entity work.clock_source port map (
CLKIN_IN => clk,
CLKFX_OUT => clk_vga
);
terminal: entity work.terminal generic map (
clk_f => clk_vga_f
) port map (
clk => clk_vga,
reset => reset,
write_enable => '0',
write_data => x"00",
dvi_d => dvi_d,
dvi_clk_p => dvi_clk_p,
dvi_clk_n => dvi_clk_n,
dvi_hsync => dvi_hsync,
dvi_vsync => dvi_vsync,
dvi_de => dvi_de,
dvi_reset => dvi_reset,
i2c_scl => i2c_scl,
i2c_sda => i2c_sda
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);
keyboard_i: entity work.keyboard generic map (
input_clk => clk_vga_f
) port map (
clk => clk_vga,
reset => reset,
bytes_received => led(5 downto 0),
ps2_scl => ps2_scl,
ps2_sda => ps2_sda
);
led(7) <= reset;
led(6) <= '0';
end syn;