rocket-chip/scala at ba6dd160a3bab923f3f1d6ccafafadf08a8d578f - rocket-chip - Tiband Gitea

riscv/rocket-chip

History

Henry Cook ba6dd160a3 diplomacy: allow access to sram Device info

2017-12-22 19:00:43 -08:00

..

Error device: require explicit control of atomic and transfer sizes

2017-12-08 13:41:09 -08:00

config: fix warning

2017-09-22 14:58:36 -07:00

coreplex: HasTiles supplies def tileParams

2017-12-20 17:18:55 -08:00

Error device: require explicit control of atomic and transfer sizes

2017-12-08 13:41:09 -08:00

diplomacy: allow access to sram Device info

2017-12-22 19:00:43 -08:00

coreplex: make HasTiles more generic

2017-12-20 17:18:55 -08:00

diplomacy: provide a val name for all LazyModule constructions

2017-12-01 11:28:21 -08:00

JTAG: Revert to Chisel._ for Issue 1160 (#1161 )

2017-12-18 21:02:31 -08:00

regmapper: fix d_ready => d_bits loop in RegField.bytes

2017-11-30 16:38:45 -08:00

Revert "ICache: stores to the ITIM have effects (shrinking valid ITIM data) (#1144 )" (#1162 )

2017-12-19 12:16:26 -08:00

coreplex: WithStatelessBridge => WithIncoherentTiles (#1092 )

2017-11-07 13:47:56 -08:00

coreplex: make HasTiles more generic

2017-12-20 17:18:55 -08:00

diplomacy: remove the :=? operator in favour of magic :*=* (#1139 )

2017-12-01 18:28:37 -08:00

unittest: add an API for describing LazyModule unit tests

2017-12-01 11:26:59 -08:00

Add Cross Cover Property Library (#1149 )

2017-12-07 18:46:10 -08:00