Wesley W. Terpstra 5b31fb81fe tilelink2: IDNode needs to be specialized for output vs. input passthrough

2016-09-05 20:58:39 -07:00

..

Bases.scala

tilelink2: IDNode needs to be specialized for output vs. input passthrough

2016-09-05 20:58:39 -07:00

Bundles.scala

tilelink2: rename wmask => mask since it also applies to reads

2016-09-05 20:58:39 -07:00

GPIO.scala

tilelink2: connect abstract register-based modules to TileLink

2016-09-05 20:58:38 -07:00

HintHandler.scala

tilelink2: don't apply HintHandler to B=>C by default

2016-09-05 20:58:39 -07:00

Legacy.scala

tilelink2: TLLegacy converts from legacy TileLink to TileLink2

2016-09-05 20:58:39 -07:00

Monitor.scala

tilelink2: rename wmask => mask since it also applies to reads

2016-09-05 20:58:39 -07:00

Nodes.scala

tilelink2: IDNode needs to be specialized for output vs. input passthrough

2016-09-05 20:58:39 -07:00

Operations.scala

tilelink2: rename wmask => mask since it also applies to reads

2016-09-05 20:58:39 -07:00

Parameters.scala

tilelink2: optimize support testing circuits

2016-09-05 20:58:39 -07:00

RegField.scala

tilelink2: support ready-valid enqueue+dequeue on register fields

2016-09-05 20:58:38 -07:00

RegisterRouter.scala

tilelink2: rename wmask => mask since it also applies to reads

2016-09-05 20:58:39 -07:00

SRAM.scala

tilelink2: rename wmask => mask since it also applies to reads

2016-09-05 20:58:39 -07:00

Xbar.scala

tilelink2: add an intermediate type for simple factories

2016-09-05 20:58:38 -07:00