Howard Mao
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87be2bcd60
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make sure TraceGen addresses are correct
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2016-05-20 16:12:11 -07:00 |
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Andrew Waterman
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7285f5e6bf
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Don't drive D$ kill/phys signals for SimpleHellaCacheIF
They don't do anything.
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2016-04-01 19:31:54 -07:00 |
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Matthew Naylor
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bda5772e98
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Updates to the trace-generator: (1) Don't terminate via HTIF exit, which can cause other, unfinished, cores to be cut short. Instead emit FINISHED messsages allowing an external process to send a SIGTERM to the emulator once all cores have finished. (2) Add some support for greater address variation without having to recompile, disabled by default. (3) Generate atomic, LR/SC, and fence operations by default in addition to plain loads and stores. These changes require newer versions of files in the rocket-chip/scripts directory. I will submit a pull request for those too.
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2016-03-18 12:11:11 +00:00 |
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Palmer Dabbelt
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bf06ba0d37
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Pass a BitPat to Lookup
This is the only supported type of Lookup in Chisel 3.
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2016-03-05 18:50:56 -08:00 |
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Matthew Naylor
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1b6871f3d8
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Add author, affiliation, and sponsor info to trace-generator files.
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2016-02-23 15:30:11 +00:00 |
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Howard Mao
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91e3c9b96f
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reuse generator parameters for tracegen
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2016-02-22 09:53:31 -08:00 |
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Matthew Naylor
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e63fc3bb44
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Added trace generator
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2016-02-22 08:43:34 -08:00 |
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