Don't drive D$ kill/phys signals for SimpleHellaCacheIF

They don't do anything.

groundtest/src/main/scala/dmatest.scala

@@ -97,8 +97,6 @@ class DmaStreamTest(implicit p: Parameters) extends GroundTest()(p)
   io.cache.req.bits.data := test_data(req_index)
   io.cache.req.bits.typ  := UInt(log2Up(conf.size))
   io.cache.req.bits.cmd  := Mux(state === s_setup_req, M_XWR, M_XRD)
-  io.cache.req.bits.kill := Bool(false)
-  io.cache.req.bits.phys := Bool(false)
 
   when (state === s_start) { state := s_setup_req }
   when (state === s_setup_req && req_done) { state := s_setup_wait }
@@ -173,8 +171,6 @@ class DmaTest(implicit p: Parameters) extends GroundTest()(p)
   io.cache.req.bits.data := req_data
   io.cache.req.bits.typ  := MT_W
   io.cache.req.bits.cmd  := Mux(state === s_fill_req, M_XWR, M_XRD)
-  io.cache.req.bits.kill := Bool(false)
-  io.cache.req.bits.phys := Bool(false)
 
   when (state === s_start) {
     req_addr := sourceAddrs(testIdx)

groundtest/src/main/scala/generator.scala

@@ -162,8 +162,6 @@ class HellaCacheGenerator(id: Int)
   io.mem.req.bits.typ  := MT_D
   io.mem.req.bits.cmd  := Mux(state === s_write, M_XWR, M_XRD)
   io.mem.req.bits.tag  := UInt(0)
-  io.mem.req.bits.kill := Bool(false)
-  io.mem.req.bits.phys := Bool(true)
 
   when (state === s_start) { sending := Bool(true); state := s_write }
 

groundtest/src/main/scala/regression.scala

@@ -53,8 +53,6 @@ class IOGetAfterPutBlockRegression(implicit p: Parameters) extends Regression()(
   io.cache.req.bits.typ := MT_W
   io.cache.req.bits.cmd := M_XRD
   io.cache.req.bits.tag := UInt(0)
-  io.cache.req.bits.kill := Bool(false)
-  io.cache.req.bits.phys := Bool(true)
 
   when (put_done) { put_sent := Bool(true) }
   when (io.cache.req.fire()) { get_sent := Bool(true) }

groundtest/src/main/scala/tracegen.scala

@@ -470,8 +470,6 @@ class TraceGenerator(id: Int)
   io.mem.req.bits.typ  := MT_D
   io.mem.req.bits.cmd  := reqCmd
   io.mem.req.bits.tag  := reqTag
-  io.mem.req.bits.kill := Bool(false)
-  io.mem.req.bits.phys := Bool(true)
 
   // On cycle when request is actually sent, print it
   when (io.mem.req.fire()) {