riscv/rocket-chip
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Pass a BitPat to Lookup

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This is the only supported type of Lookup in Chisel 3.
This commit is contained in:
Palmer Dabbelt 2016-03-05 18:50:56 -08:00
parent c2e9971b5f
commit bf06ba0d37
1 changed files with 1 additions and 1 deletions
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groundtest/src/main/scala/tracegen.scala
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@ -133,7 +133,7 @@ class TagMan(val logNumTags : Int) extends Module {
val inUse = List.fill(numTags)(Reg(init = Bool(false)))
// Mapping from each tag to its 'inUse' bit
val inUseMap = (0 to numTags-1).map(i => UInt(i, logNumTags)).zip(inUse)
val inUseMap = (0 to numTags-1).map(i => BitPat(UInt(i))).zip(inUse)
// Next tag to offer
val nextTag = Reg(init = UInt(0, logNumTags))