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riscv/rocket-chip
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Code Releases Activity
54 Commits 1 Branch 0 Tags
516a64f5760a2762bd35d9cbdfff22b3a99915f8
Commit Graph
10 Commits
Author SHA1 Message Date
Andrew Waterman bbd010750f add missing #include 2013-01-06 04:53:40 -08:00
Andrew Waterman d911e635d6 simplify c++ memory models; support +dramsim flag
works for both vlsi and emulator
2012-12-04 07:04:26 -08:00
Andrew Waterman 6d47d18c2b catch sigterm to gracefully exit (fixes vcd) 2012-11-20 05:40:44 -08:00
Andrew Waterman b58214d7e3 remove more global constants 2012-11-17 17:25:43 -08:00
Andrew Waterman cf05b604b3 upgrade to new rocket; improve vlsi makefiles 2012-11-17 07:21:29 -08:00
Andrew Waterman e2afae011a factor out global constants 2012-11-06 08:18:40 -08:00
Andrew Waterman 4ed2d614a2 update to new rocket; retime fpu in dc-syn 2012-11-04 16:43:02 -08:00
Andrew Waterman edf0eeed01 integrate updated rocket/uncore 2012-10-18 17:51:41 -07:00
Miquel Moreto 5d75ddc553 Added dramsim2 memory model to the emulator backend 2012-10-14 14:06:28 -07:00
Huy Vo 93a0182b96 everything to get emulator working 2012-10-01 19:30:11 -07:00
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