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Commit Graph

16 Commits

Author SHA1 Message Date
Andrew Waterman
29bc361d6c remove global constants; disentangle hwacha a bit 2012-11-17 17:24:08 -08:00
Henry Cook
88ac5af181 Merged consts-as-traits 2012-10-16 16:32:35 -07:00
Andrew Waterman
661f8e635b merge I$, ITLB, BTB into Frontend 2012-10-16 02:24:37 -07:00
Henry Cook
dfdfddebe8 constants as traits 2012-10-07 22:20:03 -07:00
Huy Vo
fd95159837 INPUT/OUTPUT orderring swapped 2012-07-12 18:16:57 -07:00
Andrew Waterman
eafdffe125 simplify page table walker; speed up emulator 2012-05-01 01:24:36 -07:00
Andrew Waterman
cfca2d1411 clean up cache interfaces; avoid reserved keywords 2012-03-16 00:44:16 -07:00
Yunsup Lee
94ba32bbd3 change package name and sbt project name to rocket 2012-02-25 17:09:26 -08:00
Yunsup Lee
a51c7cc927 new build system with updated chisel, hwacha 2012-02-14 19:43:59 -08:00
Andrew Waterman
e9da2cf66a improve id/ex datapath
move operand selection into decode stage; simplify bypassing
2012-02-08 06:47:26 -08:00
Henry Cook
1d76255dc1 new chisel version jar and find and replace INPUT and OUTPUT 2012-01-18 14:39:57 -08:00
Andrew Waterman
eb657dd250 reduce superfluous replays
we only replay after a cache miss if we mis-scheduled the use of a load.
2012-01-01 21:28:38 -08:00
Andrew Waterman
efc623cc36 validate BTB address and use BTB for J/JAL/JR/JALR
even if we weren't using the BTB for JR/JALR, we'd need to
flush the BTB on FENCE.I and on context switches, but
validating its result suffices instead.
2012-01-01 17:04:14 -08:00
Andrew Waterman
96c78829b4 improve ALU and fix revealed emulator bug 2011-12-17 07:20:32 -08:00
Rimas Avizienis
9aca403aa8 more itlb integration & cleanup 2011-11-09 23:18:14 -08:00
Rimas Avizienis
c06e2d16e4 initial commit of rocket chisel project, riscv assembly tests and benchmarks 2011-10-25 23:02:47 -07:00