Howard Mao
cdc476a370
change Rocc parameterization
2015-12-01 17:56:09 -08:00
Andrew Waterman
e0d849fec5
Fix zscale testing
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Use the following command in vsim:
make CONFIG=ZscaleConfig MODEL=ZscaleTop TB=ZscaleTestHarness run-asm-tests
2015-12-01 17:31:48 -08:00
Andrew Waterman
5eeb8969f6
fix zscale build (run still fails)
2015-12-01 16:20:34 -08:00
Howard Mao
c8c68e75bb
base NGenerators on NTiles, not the other way around
2015-12-01 15:26:09 -08:00
Howard Mao
e4043570bd
bump groundtest and hardfloat
2015-11-30 18:06:15 -08:00
Howard Mao
40d68406d6
use xlen parameter for ALU
2015-11-30 18:04:44 -08:00
Colin Schmidt
ec4ade988b
[travis] add multiple configs including rocc
2015-11-28 07:17:49 -08:00
Colin Schmidt
7259239ba4
Merge pull request #31 from ucb-bar/multirocc
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implement support for multiple RoCC accelerators
2015-11-28 08:56:07 -05:00
Howard Mao
23f0756978
implement support for multiple RoCC accelerators
2015-11-26 12:49:04 -08:00
Andrew Waterman
e25a020e60
Construct device tree ROM in MMIO region
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Rebuild riscv-tools for this to work!
2015-11-25 21:23:37 -08:00
Andrew Waterman
49d93da87e
Factor out more common zscale code
2015-11-24 19:17:21 -08:00
Andrew Waterman
52b25c3da0
Factor out more common zscale code
2015-11-24 18:34:03 -08:00
Andrew Waterman
1761db3272
Factor out some common code from zscale
2015-11-24 18:14:06 -08:00
Howard Mao
ec6bfde9a3
fix WritebackUnit issue in uncore
2015-11-21 16:11:22 -08:00
Howard Mao
9d50f37289
fix unused set issue for multiple L2 cache banks
2015-11-20 23:26:28 -08:00
Howard Mao
ad3b7fd0e1
adjust CacheFillTest configuration
2015-11-19 10:52:14 -08:00
Howard Mao
4806f72b08
add CacheFillTest to check L2 conflict misses
2015-11-19 00:16:28 -08:00
Howard Mao
3514b6eb87
add some more useful configurations
2015-11-18 22:11:17 -08:00
Howard Mao
379d43d5f4
make MultiChannel routing more performant
2015-11-18 22:11:17 -08:00
Yunsup Lee
ea8ba49805
improve memory system: specialize MultiChannel routing
2015-11-18 21:58:22 -08:00
Andrew Waterman
5195a5b891
Remove IPI network
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This is now provided via MMIO.
2015-11-16 21:53:14 -08:00
Henry Cook
485f1b7bd7
bump uncore
2015-11-16 18:14:03 -08:00
Yunsup Lee
8916c7e99c
push rocket
2015-11-14 16:43:28 -08:00
Yunsup Lee
6a6371fdb6
move to new version of hardfloat
2015-11-14 14:50:13 -08:00
Howard Mao
a1063bad54
fix issues with non-allocating put/get
2015-11-12 15:54:34 -08:00
Colin Schmidt
97d0e195ae
Merge pull request #28 from ucb-bar/yusnup
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Don't re-generate the .d files on "make clean"
2015-11-12 00:46:21 -08:00
Palmer Dabbelt
07f0e6be94
Don't re-generate the .d files on "make clean"
2015-11-12 00:41:55 -08:00
Howard Mao
6ddf81090b
didn't mean to turn off GenerateCached in last commit
2015-11-11 17:39:08 -08:00
Howard Mao
11f0b3d8db
restore old L2 cache AcquireTransactor configuration
2015-11-11 17:10:58 -08:00
Howard Mao
31da692ccc
default to single tile in WithMemtest
2015-11-11 14:54:13 -08:00
Howard Mao
55581195eb
add groundtest submodule for simple memory testing
2015-11-11 14:33:02 -08:00
Howard Mao
149480411e
make sure ClientTileLinkEnqueuer uses the correct parameters
2015-11-10 16:09:19 -08:00
Howard Mao
51f128ec74
actually use backendBuffering in front of unwrapper/converter chain
2015-11-09 11:50:18 -08:00
Yunsup Lee
1e772daeea
no spaces in Makefrag
2015-11-05 16:42:05 -08:00
Howard Mao
cb0c2df051
update fpga-zynq
2015-11-05 10:50:13 -08:00
Howard Mao
42e7067400
bump uncore
2015-11-05 10:49:25 -08:00
Howard Mao
bbf14ddc01
use definitions in consts header whenever possible
2015-11-05 10:48:32 -08:00
Howard Mao
fb501e75c0
fixes for sub-block TL requests in uncore
2015-11-05 10:48:32 -08:00
Howard Mao
7b252d8f89
get rid of now-unnecessary bits in MIF tag
2015-11-05 10:48:32 -08:00
Howard Mao
ba5a6af05c
correctly stripe data across memory channels in simulation
2015-11-05 10:48:32 -08:00
Sagar Karandikar
ee9195be26
rename NBANKS knob to NBANKS_PER_MEM_CHANNEL for clarity
2015-11-05 10:48:32 -08:00
Sagar Karandikar
354abf5e6b
fix NSets calculation
2015-11-05 10:48:32 -08:00
Howard Mao
dcef020ca0
get multichannel simulation working in emulator
2015-11-05 10:48:32 -08:00
Howard Mao
04d92dddbd
add back decoupled NASTI connection at edge of RocketChip
2015-11-05 10:48:32 -08:00
Yunsup Lee
51116e0674
add 2 and 4 memory channel configs
2015-11-05 10:48:32 -08:00
Yunsup Lee
0d245741bc
add multichannel NASTI support in Verilog testbench
2015-11-05 10:48:32 -08:00
Howard Mao
9dabcab9c2
Get rid of MemIO in Top and replace with AXI throughout
2015-11-05 10:48:32 -08:00
Colin Schmidt
032bdd0601
Merge pull request #24 from ucb-bar/regression-master
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Add a "--master" flag to the regression script
2015-10-29 14:15:44 -07:00
Palmer Dabbelt
3d2a4ffdd6
Add a "--master" flag to the regression script
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I want to be able to test the master of riscv-gnu-toolchain against the current
RTL as part of the buildbot. This flag takes a list of repositories (by their
submodule path) and updates those to the current master, which facilitates that
check.
2015-10-29 14:11:26 -07:00
Howard Mao
eb62ff6a50
add queues between Nasti -> TL converter and Nasti interconnect
2015-10-26 14:15:25 -07:00
