riscv/rocket-chip
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fix issues with non-allocating put/get

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This commit is contained in:
Howard Mao
2015-11-12 15:53:35 -08:00
parent 97d0e195ae
commit a1063bad54
4 changed files with 5 additions and 4 deletions
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2
groundtest

Submodule groundtest updated: 5ed7616fef...cb4b70a820

2
rocket

Submodule rocket updated: e31be75a6a...d4939b57e0

3
src/main/scala/Configs.scala
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@ -267,7 +267,8 @@ class WithMemtest extends Config (
case NGeneratorsPerTile => 1
case GenerateUncached => true
case GenerateCached => true
case MaxGenerateRequests => 8192
case MaxGenerateRequests => 128
case GeneratorStartAddress => 0
case BuildTiles => {
(0 until site(NTiles)).map { i =>

2
uncore

Submodule uncore updated: edf24e289d...e53b5072ca