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11 Commits

Author SHA1 Message Date
Huy Vo
04304fe788 moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
Andrew Waterman
eafdffe125 simplify page table walker; speed up emulator 2012-05-01 01:24:36 -07:00
Yunsup Lee
264732556f fixes to match verilog X semantics 2012-03-19 03:10:00 -07:00
Yunsup Lee
94ba32bbd3 change package name and sbt project name to rocket 2012-02-25 17:09:26 -08:00
Andrew Waterman
0366465cb1 parameterize the scoreboards 2012-02-13 18:12:23 -08:00
Andrew Waterman
725190d0ee update to new chisel 2012-02-11 17:20:33 -08:00
Andrew Waterman
5403d069e9 add fp loads/stores 2012-02-07 23:54:25 -08:00
Henry Cook
1d76255dc1 new chisel version jar and find and replace INPUT and OUTPUT 2012-01-18 14:39:57 -08:00
Andrew Waterman
3045b33460 remove second RF write port
load miss writebacks are treated like mul/div now.
2012-01-02 02:51:30 -08:00
Andrew Waterman
ffe23a1ee8 fix WAW hazard handling 2012-01-02 00:25:11 -08:00
Rimas Avizienis
c06e2d16e4 initial commit of rocket chisel project, riscv assembly tests and benchmarks 2011-10-25 23:02:47 -07:00