2014-09-10 05:49:28 +02:00
|
|
|
# UCB use only
|
|
|
|
-include $(base_dir)/Makefrag-refchip
|
|
|
|
|
2014-09-11 11:38:21 +02:00
|
|
|
# check RISCV environment variable
|
|
|
|
ifndef RISCV
|
|
|
|
$(error Please set environment variable RISCV. Please take a look at README)
|
|
|
|
endif
|
|
|
|
|
2012-10-19 02:51:41 +02:00
|
|
|
MODEL := Top
|
2012-10-02 04:30:11 +02:00
|
|
|
CXX := g++
|
2014-01-31 21:25:19 +01:00
|
|
|
CXXFLAGS := -O1
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2012-11-20 14:39:48 +01:00
|
|
|
SBT := java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
src_path = src/main/scala
|
2014-09-10 05:49:28 +02:00
|
|
|
chisel_srcs = $(base_dir)/$(src_path)/*.scala $(base_dir)/rocket/$(src_path)/*.scala $(base_dir)/uncore/$(src_path)/*.scala $(SRC_EXTENSION)
|
2014-09-01 05:26:55 +02:00
|
|
|
|
|
|
|
disasm := 2>
|
|
|
|
which_disasm := $(shell which riscv-dis)
|
|
|
|
ifneq ($(which_disasm),)
|
2014-09-10 05:49:28 +02:00
|
|
|
disasm := 3>&1 1>&2 2>&3 | $(which_disasm) $(DISASM_EXTENSION) >
|
2014-09-01 05:26:55 +02:00
|
|
|
endif
|
|
|
|
|
|
|
|
timeout_cycles = 100000000
|
|
|
|
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Verilog Generation
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/$(MODEL).$(CONFIG).v: $(chisel_srcs)
|
2014-09-11 02:14:55 +02:00
|
|
|
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate $(MODEL) --backend $(BACKEND) --targetDir $(generated_dir) --noInlineMem --configInstance rocketchip.$(CONFIG) --configDump"
|
2014-09-01 05:26:55 +02:00
|
|
|
cd $(generated_dir) && \
|
2014-09-12 07:11:58 +02:00
|
|
|
if [ -a $(MODEL).$(CONFIG).conf ]; then \
|
|
|
|
$(mem_gen) $(generated_dir)/$(MODEL).$(CONFIG).conf >> $(generated_dir)/$(MODEL).$(CONFIG).v; \
|
2014-09-01 05:26:55 +02:00
|
|
|
fi
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/consts.$(CONFIG).vh: $(generated_dir)/$(MODEL).$(CONFIG).v
|
2014-09-11 02:14:55 +02:00
|
|
|
echo "\`ifndef CONST_VH" > $@
|
|
|
|
echo "\`define CONST_VH" >> $@
|
2014-09-12 07:11:58 +02:00
|
|
|
sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/`define \1 \2/' $(patsubst %.v,%.prm,$<) >> $@
|
2014-09-11 02:14:55 +02:00
|
|
|
echo "\`endif // CONST_VH" >> $@
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/memdessertMemDessert.$(CONFIG).v: $(base_dir)/$(src_path)/*.scala $(base_dir)/uncore/$(src_path)/*.scala
|
2014-09-08 09:21:57 +02:00
|
|
|
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate MemDessert --backend v --targetDir $(generated_dir) --moduleNamePrefix memdessert --configInstance rocketchip.$(CONFIG)"
|
2014-09-01 05:26:55 +02:00
|
|
|
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# DRAMSim2
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2013-05-01 11:58:53 +02:00
|
|
|
DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard $(base_dir)/dramsim2/*.cpp))
|
2012-12-04 16:04:26 +01:00
|
|
|
$(DRAMSIM_OBJS): %.o: %.cpp
|
|
|
|
$(CXX) $(CXXFLAGS) -DNO_STORAGE -DNO_OUTPUT -Dmain=nomain -c -o $@ $<
|
2013-05-01 11:58:53 +02:00
|
|
|
$(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)
|
2012-12-04 16:04:26 +01:00
|
|
|
ar rcs $@ $^
|
|
|
|
|
2012-10-02 04:30:11 +02:00
|
|
|
#--------------------------------------------------------------------
|
2014-09-01 05:26:55 +02:00
|
|
|
# ISA Tests
|
2012-10-02 04:30:11 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
tests_isa_dir = $(base_dir)/riscv-tools/riscv-tests/isa
|
|
|
|
|
2013-04-24 10:59:14 +02:00
|
|
|
asm_p_tests = \
|
|
|
|
rv64ui-p-add \
|
|
|
|
rv64ui-p-addi \
|
|
|
|
rv64ui-p-amoadd_d \
|
|
|
|
rv64ui-p-amoadd_w \
|
|
|
|
rv64ui-p-amoand_d \
|
|
|
|
rv64ui-p-amoand_w \
|
|
|
|
rv64ui-p-amoor_d \
|
|
|
|
rv64ui-p-amoor_w \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64ui-p-amoxor_d \
|
|
|
|
rv64ui-p-amoxor_w \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64ui-p-amoswap_d \
|
|
|
|
rv64ui-p-amoswap_w \
|
|
|
|
rv64ui-p-amomax_d \
|
|
|
|
rv64ui-p-amomax_w \
|
|
|
|
rv64ui-p-amomaxu_d \
|
|
|
|
rv64ui-p-amomaxu_w \
|
|
|
|
rv64ui-p-amomin_d \
|
|
|
|
rv64ui-p-amomin_w \
|
|
|
|
rv64ui-p-amominu_d \
|
|
|
|
rv64ui-p-amominu_w \
|
|
|
|
rv64ui-p-auipc \
|
|
|
|
rv64ui-p-fence_i \
|
|
|
|
rv64ui-p-sb \
|
|
|
|
rv64ui-p-sd \
|
|
|
|
rv64ui-p-sh \
|
|
|
|
rv64ui-p-sw \
|
|
|
|
rv64ui-p-addiw \
|
|
|
|
rv64ui-p-addw \
|
|
|
|
rv64ui-p-and \
|
|
|
|
rv64ui-p-andi \
|
|
|
|
rv64ui-p-beq \
|
|
|
|
rv64ui-p-bge \
|
|
|
|
rv64ui-p-bgeu \
|
|
|
|
rv64ui-p-blt \
|
|
|
|
rv64ui-p-bltu \
|
|
|
|
rv64ui-p-bne \
|
|
|
|
rv64ui-p-div \
|
|
|
|
rv64ui-p-divu \
|
|
|
|
rv64ui-p-divuw \
|
|
|
|
rv64ui-p-divw \
|
|
|
|
rv64ui-p-j \
|
|
|
|
rv64ui-p-jal \
|
|
|
|
rv64ui-p-jalr \
|
|
|
|
rv64ui-p-lb \
|
|
|
|
rv64ui-p-lbu \
|
|
|
|
rv64ui-p-ld \
|
|
|
|
rv64ui-p-lh \
|
|
|
|
rv64ui-p-lhu \
|
|
|
|
rv64ui-p-lui \
|
|
|
|
rv64ui-p-lw \
|
|
|
|
rv64ui-p-lwu \
|
|
|
|
rv64ui-p-mul \
|
|
|
|
rv64ui-p-mulh \
|
|
|
|
rv64ui-p-mulhsu \
|
|
|
|
rv64ui-p-mulhu \
|
|
|
|
rv64ui-p-mulw \
|
|
|
|
rv64ui-p-or \
|
|
|
|
rv64ui-p-ori \
|
|
|
|
rv64ui-p-rem \
|
|
|
|
rv64ui-p-remu \
|
|
|
|
rv64ui-p-remuw \
|
|
|
|
rv64ui-p-remw \
|
|
|
|
rv64ui-p-simple \
|
|
|
|
rv64ui-p-sll \
|
|
|
|
rv64ui-p-slli \
|
|
|
|
rv64ui-p-slliw \
|
|
|
|
rv64ui-p-sllw \
|
|
|
|
rv64ui-p-slt \
|
|
|
|
rv64ui-p-slti \
|
|
|
|
rv64ui-p-sltiu \
|
|
|
|
rv64ui-p-sltu \
|
|
|
|
rv64ui-p-sra \
|
|
|
|
rv64ui-p-srai \
|
|
|
|
rv64ui-p-sraiw \
|
|
|
|
rv64ui-p-sraw \
|
|
|
|
rv64ui-p-srliw \
|
|
|
|
rv64ui-p-srlw \
|
|
|
|
rv64ui-p-sub \
|
|
|
|
rv64ui-p-subw \
|
|
|
|
rv64ui-p-xor \
|
|
|
|
rv64ui-p-xori \
|
|
|
|
rv64uf-p-ldst \
|
|
|
|
rv64uf-p-move \
|
|
|
|
rv64uf-p-fsgnj \
|
|
|
|
rv64uf-p-fcmp \
|
|
|
|
rv64uf-p-fcvt \
|
|
|
|
rv64uf-p-fcvt_w \
|
2014-03-12 03:12:20 +01:00
|
|
|
rv64uf-p-fclass \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64uf-p-fadd \
|
|
|
|
rv64uf-p-fmin \
|
|
|
|
rv64uf-p-fmadd \
|
|
|
|
rv64uf-p-structural \
|
2014-01-22 01:20:24 +01:00
|
|
|
rv64si-p-coreid \
|
|
|
|
rv64si-p-csr \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64si-pm-ipi \
|
|
|
|
rv64ui-pm-lrsc \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2013-04-24 10:59:14 +02:00
|
|
|
asm_v_tests = \
|
|
|
|
rv64ui-v-add \
|
|
|
|
rv64ui-v-addi \
|
|
|
|
rv64ui-v-amoadd_d \
|
|
|
|
rv64ui-v-amoadd_w \
|
|
|
|
rv64ui-v-amoand_d \
|
|
|
|
rv64ui-v-amoand_w \
|
|
|
|
rv64ui-v-amoor_d \
|
|
|
|
rv64ui-v-amoor_w \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64ui-v-amoxor_d \
|
|
|
|
rv64ui-v-amoxor_w \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64ui-v-amoswap_d \
|
|
|
|
rv64ui-v-amoswap_w \
|
|
|
|
rv64ui-v-amomax_d \
|
|
|
|
rv64ui-v-amomax_w \
|
|
|
|
rv64ui-v-amomaxu_d \
|
|
|
|
rv64ui-v-amomaxu_w \
|
|
|
|
rv64ui-v-amomin_d \
|
|
|
|
rv64ui-v-amomin_w \
|
|
|
|
rv64ui-v-amominu_d \
|
|
|
|
rv64ui-v-amominu_w \
|
|
|
|
rv64ui-v-auipc \
|
|
|
|
rv64ui-v-fence_i \
|
|
|
|
rv64ui-v-sb \
|
|
|
|
rv64ui-v-sd \
|
|
|
|
rv64ui-v-sh \
|
|
|
|
rv64ui-v-sw \
|
|
|
|
rv64ui-v-addiw \
|
|
|
|
rv64ui-v-addw \
|
|
|
|
rv64ui-v-and \
|
|
|
|
rv64ui-v-andi \
|
|
|
|
rv64ui-v-beq \
|
|
|
|
rv64ui-v-bge \
|
|
|
|
rv64ui-v-bgeu \
|
|
|
|
rv64ui-v-blt \
|
|
|
|
rv64ui-v-bltu \
|
|
|
|
rv64ui-v-bne \
|
|
|
|
rv64ui-v-div \
|
|
|
|
rv64ui-v-divu \
|
|
|
|
rv64ui-v-divuw \
|
|
|
|
rv64ui-v-divw \
|
|
|
|
rv64ui-v-j \
|
|
|
|
rv64ui-v-jal \
|
|
|
|
rv64ui-v-jalr \
|
|
|
|
rv64ui-v-lb \
|
|
|
|
rv64ui-v-lbu \
|
|
|
|
rv64ui-v-ld \
|
|
|
|
rv64ui-v-lh \
|
|
|
|
rv64ui-v-lhu \
|
|
|
|
rv64ui-v-lui \
|
|
|
|
rv64ui-v-lw \
|
|
|
|
rv64ui-v-lwu \
|
|
|
|
rv64ui-v-mul \
|
|
|
|
rv64ui-v-mulh \
|
|
|
|
rv64ui-v-mulhsu \
|
|
|
|
rv64ui-v-mulhu \
|
|
|
|
rv64ui-v-mulw \
|
|
|
|
rv64ui-v-or \
|
|
|
|
rv64ui-v-ori \
|
|
|
|
rv64ui-v-rem \
|
|
|
|
rv64ui-v-remu \
|
|
|
|
rv64ui-v-remuw \
|
|
|
|
rv64ui-v-remw \
|
|
|
|
rv64ui-v-sll \
|
|
|
|
rv64ui-v-slli \
|
|
|
|
rv64ui-v-slliw \
|
|
|
|
rv64ui-v-sllw \
|
|
|
|
rv64ui-v-slt \
|
|
|
|
rv64ui-v-slti \
|
|
|
|
rv64ui-v-sltiu \
|
|
|
|
rv64ui-v-sltu \
|
|
|
|
rv64ui-v-sra \
|
|
|
|
rv64ui-v-srai \
|
|
|
|
rv64ui-v-sraiw \
|
|
|
|
rv64ui-v-sraw \
|
|
|
|
rv64ui-v-srliw \
|
|
|
|
rv64ui-v-srlw \
|
|
|
|
rv64ui-v-sub \
|
|
|
|
rv64ui-v-subw \
|
|
|
|
rv64ui-v-xor \
|
|
|
|
rv64ui-v-xori \
|
|
|
|
rv64uf-v-ldst \
|
|
|
|
rv64uf-v-move \
|
|
|
|
rv64uf-v-fsgnj \
|
|
|
|
rv64uf-v-fcmp \
|
|
|
|
rv64uf-v-fcvt \
|
|
|
|
rv64uf-v-fcvt_w \
|
2014-03-12 03:12:20 +01:00
|
|
|
rv64uf-v-fclass \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64uf-v-fadd \
|
|
|
|
rv64uf-v-fmin \
|
|
|
|
rv64uf-v-fmadd \
|
|
|
|
rv64uf-v-structural \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Benchmark Tests
|
|
|
|
#--------------------------------------------------------------------
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
tests_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/benchmarks
|
2013-04-24 10:59:14 +02:00
|
|
|
bmarks = \
|
2012-10-02 04:30:11 +02:00
|
|
|
median.riscv \
|
|
|
|
multiply.riscv \
|
|
|
|
qsort.riscv \
|
|
|
|
towers.riscv \
|
|
|
|
vvadd.riscv \
|
2014-04-19 03:05:30 +02:00
|
|
|
mm.riscv \
|
2012-10-19 13:09:07 +02:00
|
|
|
dhrystone.riscv \
|
2012-11-05 01:43:02 +01:00
|
|
|
spmv.riscv \
|
2013-09-13 02:03:38 +02:00
|
|
|
#vec-vvadd.riscv \
|
|
|
|
#vec-cmplxmult.riscv \
|
|
|
|
#vec-matmul.riscv \
|
|
|
|
#mt-vvadd.riscv \
|
|
|
|
#mt-matmul.riscv \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Multi-threaded Benchmark Tests
|
|
|
|
#--------------------------------------------------------------------
|
2013-06-14 00:34:15 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
test_mt_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/mt
|
2013-06-14 00:34:15 +02:00
|
|
|
mt_bmarks = \
|
2014-09-01 05:26:55 +02:00
|
|
|
ab_matmul.riscv \
|
|
|
|
ab_vvadd.riscv \
|
|
|
|
ad_matmul.riscv \
|
|
|
|
ad_vvadd.riscv \
|
|
|
|
ae_matmul.riscv \
|
|
|
|
ae_vvadd.riscv \
|
|
|
|
af_matmul.riscv \
|
|
|
|
af_vvadd.riscv \
|
|
|
|
ag_matmul.riscv \
|
|
|
|
ag_vvadd.riscv \
|
|
|
|
ai_matmul.riscv \
|
|
|
|
ai_vvadd.riscv \
|
|
|
|
aj_vvadd.riscv \
|
|
|
|
ak_matmul.riscv \
|
|
|
|
ak_vvadd.riscv \
|
|
|
|
al_matmul.riscv \
|
|
|
|
al_vvadd.riscv \
|
|
|
|
am_matmul.riscv \
|
|
|
|
am_vvadd.riscv \
|
|
|
|
an_matmul.riscv \
|
|
|
|
ap_matmul.riscv \
|
|
|
|
ap_vvadd.riscv \
|
|
|
|
aq_matmul.riscv \
|
|
|
|
aq_vvadd.riscv \
|
|
|
|
ar_matmul.riscv \
|
|
|
|
ar_vvadd.riscv \
|
|
|
|
as_matmul.riscv \
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as_vvadd.riscv \
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at_matmul.riscv \
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at_vvadd.riscv \
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av_matmul.riscv \
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av_vvadd.riscv \
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ay_matmul.riscv \
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ay_vvadd.riscv \
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az_matmul.riscv \
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az_vvadd.riscv \
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ba_matmul.riscv \
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ba_vvadd.riscv \
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bb_matmul.riscv \
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bb_vvadd.riscv \
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bc_matmul.riscv \
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bc_vvadd.riscv \
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be_matmul.riscv \
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be_vvadd.riscv \
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bf_matmul.riscv \
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bf_vvadd.riscv \
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bh_matmul.riscv \
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bh_vvadd.riscv \
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bj_matmul.riscv \
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bj_vvadd.riscv \
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bk_matmul.riscv \
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bk_vvadd.riscv \
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bm_matmul.riscv \
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bm_vvadd.riscv \
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bn_matmul.riscv \
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bn_vvadd.riscv \
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bo_matmul.riscv \
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bo_vvadd.riscv \
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bp_matmul.riscv \
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bp_vvadd.riscv \
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br_matmul.riscv \
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br_vvadd.riscv \
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bs_matmul.riscv \
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bs_vvadd.riscv \
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bt_matmul.riscv \
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bt_vvadd.riscv \
|
2013-09-15 13:25:53 +02:00
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2014-09-01 05:26:55 +02:00
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|
#--------------------------------------------------------------------
|
|
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|
# Build Tests
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
|
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|
%.hex:
|
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|
$(MAKE) -C $(dir $@) $(notdir $@)
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%.riscv.hex: %
|
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|
$(MAKE) -C $(dir $@) $(notdir $@)
|
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|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(asm_p_tests) $(asm_v_tests) $(vecasm_p_tests) $(vecasm_v_tests) $(vecasm_pt_tests))): $(output_dir)/%.hex: $(tests_isa_dir)/%.hex
|
|
|
|
mkdir -p $(output_dir)
|
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|
|
ln -fs $< $@
|
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|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(bmarks))): $(output_dir)/%.hex: $(tests_bmark_dir)/%.hex
|
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|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
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|
|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(mt_bmarks))): $(output_dir)/%.hex: $(test_mt_bmark_dir)/%.hex
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|