2014-09-10 05:49:28 +02:00
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|
# UCB use only
|
2015-07-07 02:15:27 +02:00
|
|
|
-include $(base_dir)/Makefrag-boomchip
|
|
|
|
-include $(base_dir)/Makefrag-hwachachip
|
2014-09-10 05:49:28 +02:00
|
|
|
|
2014-09-11 11:38:21 +02:00
|
|
|
# check RISCV environment variable
|
|
|
|
ifndef RISCV
|
|
|
|
$(error Please set environment variable RISCV. Please take a look at README)
|
|
|
|
endif
|
|
|
|
|
2012-10-19 02:51:41 +02:00
|
|
|
MODEL := Top
|
2012-10-02 04:30:11 +02:00
|
|
|
CXX := g++
|
2014-01-31 21:25:19 +01:00
|
|
|
CXXFLAGS := -O1
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2012-11-20 14:39:48 +01:00
|
|
|
SBT := java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar
|
2015-06-26 08:17:35 +02:00
|
|
|
SHELL := /bin/bash
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
src_path = src/main/scala
|
2014-09-10 05:49:28 +02:00
|
|
|
chisel_srcs = $(base_dir)/$(src_path)/*.scala $(base_dir)/rocket/$(src_path)/*.scala $(base_dir)/uncore/$(src_path)/*.scala $(SRC_EXTENSION)
|
2014-09-01 05:26:55 +02:00
|
|
|
|
|
|
|
disasm := 2>
|
2015-06-26 08:17:35 +02:00
|
|
|
which_disasm := $(shell which spike-dasm)
|
2014-09-01 05:26:55 +02:00
|
|
|
ifneq ($(which_disasm),)
|
2014-09-10 05:49:28 +02:00
|
|
|
disasm := 3>&1 1>&2 2>&3 | $(which_disasm) $(DISASM_EXTENSION) >
|
2014-09-01 05:26:55 +02:00
|
|
|
endif
|
|
|
|
|
|
|
|
timeout_cycles = 100000000
|
|
|
|
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Verilog Generation
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/$(MODEL).$(CONFIG).v: $(chisel_srcs)
|
2015-06-26 08:17:35 +02:00
|
|
|
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate $(MODEL) --backend $(BACKEND) --targetDir $(generated_dir) --configDump --noInlineMem --configInstance rocketchip.$(CONFIG)"
|
2014-09-01 05:26:55 +02:00
|
|
|
cd $(generated_dir) && \
|
2014-09-12 07:11:58 +02:00
|
|
|
if [ -a $(MODEL).$(CONFIG).conf ]; then \
|
|
|
|
$(mem_gen) $(generated_dir)/$(MODEL).$(CONFIG).conf >> $(generated_dir)/$(MODEL).$(CONFIG).v; \
|
2014-09-01 05:26:55 +02:00
|
|
|
fi
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/consts.$(CONFIG).vh: $(generated_dir)/$(MODEL).$(CONFIG).v
|
2014-09-11 02:14:55 +02:00
|
|
|
echo "\`ifndef CONST_VH" > $@
|
|
|
|
echo "\`define CONST_VH" >> $@
|
2014-09-12 07:11:58 +02:00
|
|
|
sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/`define \1 \2/' $(patsubst %.v,%.prm,$<) >> $@
|
2014-09-11 02:14:55 +02:00
|
|
|
echo "\`endif // CONST_VH" >> $@
|
|
|
|
|
2014-09-12 07:11:58 +02:00
|
|
|
$(generated_dir)/memdessertMemDessert.$(CONFIG).v: $(base_dir)/$(src_path)/*.scala $(base_dir)/uncore/$(src_path)/*.scala
|
2014-09-08 09:21:57 +02:00
|
|
|
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate MemDessert --backend v --targetDir $(generated_dir) --moduleNamePrefix memdessert --configInstance rocketchip.$(CONFIG)"
|
2014-09-01 05:26:55 +02:00
|
|
|
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# DRAMSim2
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2013-05-01 11:58:53 +02:00
|
|
|
DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard $(base_dir)/dramsim2/*.cpp))
|
2012-12-04 16:04:26 +01:00
|
|
|
$(DRAMSIM_OBJS): %.o: %.cpp
|
|
|
|
$(CXX) $(CXXFLAGS) -DNO_STORAGE -DNO_OUTPUT -Dmain=nomain -c -o $@ $<
|
2013-05-01 11:58:53 +02:00
|
|
|
$(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)
|
2012-12-04 16:04:26 +01:00
|
|
|
ar rcs $@ $^
|
|
|
|
|
2012-10-02 04:30:11 +02:00
|
|
|
#--------------------------------------------------------------------
|
2014-09-01 05:26:55 +02:00
|
|
|
# ISA Tests
|
2012-10-02 04:30:11 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
tests_isa_dir = $(base_dir)/riscv-tools/riscv-tests/isa
|
|
|
|
|
2013-04-24 10:59:14 +02:00
|
|
|
asm_p_tests = \
|
|
|
|
rv64ui-p-add \
|
|
|
|
rv64ui-p-addi \
|
|
|
|
rv64ui-p-amoadd_d \
|
|
|
|
rv64ui-p-amoadd_w \
|
|
|
|
rv64ui-p-amoand_d \
|
|
|
|
rv64ui-p-amoand_w \
|
|
|
|
rv64ui-p-amoor_d \
|
|
|
|
rv64ui-p-amoor_w \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64ui-p-amoxor_d \
|
|
|
|
rv64ui-p-amoxor_w \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64ui-p-amoswap_d \
|
|
|
|
rv64ui-p-amoswap_w \
|
|
|
|
rv64ui-p-amomax_d \
|
|
|
|
rv64ui-p-amomax_w \
|
|
|
|
rv64ui-p-amomaxu_d \
|
|
|
|
rv64ui-p-amomaxu_w \
|
|
|
|
rv64ui-p-amomin_d \
|
|
|
|
rv64ui-p-amomin_w \
|
|
|
|
rv64ui-p-amominu_d \
|
|
|
|
rv64ui-p-amominu_w \
|
|
|
|
rv64ui-p-auipc \
|
|
|
|
rv64ui-p-fence_i \
|
|
|
|
rv64ui-p-sb \
|
|
|
|
rv64ui-p-sd \
|
|
|
|
rv64ui-p-sh \
|
|
|
|
rv64ui-p-sw \
|
|
|
|
rv64ui-p-addiw \
|
|
|
|
rv64ui-p-addw \
|
|
|
|
rv64ui-p-and \
|
|
|
|
rv64ui-p-andi \
|
|
|
|
rv64ui-p-beq \
|
|
|
|
rv64ui-p-bge \
|
|
|
|
rv64ui-p-bgeu \
|
|
|
|
rv64ui-p-blt \
|
|
|
|
rv64ui-p-bltu \
|
|
|
|
rv64ui-p-bne \
|
|
|
|
rv64ui-p-div \
|
|
|
|
rv64ui-p-divu \
|
|
|
|
rv64ui-p-divuw \
|
|
|
|
rv64ui-p-divw \
|
|
|
|
rv64ui-p-j \
|
|
|
|
rv64ui-p-jal \
|
|
|
|
rv64ui-p-jalr \
|
|
|
|
rv64ui-p-lb \
|
|
|
|
rv64ui-p-lbu \
|
|
|
|
rv64ui-p-ld \
|
|
|
|
rv64ui-p-lh \
|
|
|
|
rv64ui-p-lhu \
|
|
|
|
rv64ui-p-lui \
|
|
|
|
rv64ui-p-lw \
|
|
|
|
rv64ui-p-lwu \
|
|
|
|
rv64ui-p-mul \
|
|
|
|
rv64ui-p-mulh \
|
|
|
|
rv64ui-p-mulhsu \
|
|
|
|
rv64ui-p-mulhu \
|
|
|
|
rv64ui-p-mulw \
|
|
|
|
rv64ui-p-or \
|
|
|
|
rv64ui-p-ori \
|
|
|
|
rv64ui-p-rem \
|
|
|
|
rv64ui-p-remu \
|
|
|
|
rv64ui-p-remuw \
|
|
|
|
rv64ui-p-remw \
|
|
|
|
rv64ui-p-simple \
|
|
|
|
rv64ui-p-sll \
|
|
|
|
rv64ui-p-slli \
|
|
|
|
rv64ui-p-slliw \
|
|
|
|
rv64ui-p-sllw \
|
|
|
|
rv64ui-p-slt \
|
|
|
|
rv64ui-p-slti \
|
|
|
|
rv64ui-p-sltiu \
|
|
|
|
rv64ui-p-sltu \
|
|
|
|
rv64ui-p-sra \
|
|
|
|
rv64ui-p-srai \
|
|
|
|
rv64ui-p-sraiw \
|
|
|
|
rv64ui-p-sraw \
|
|
|
|
rv64ui-p-srliw \
|
|
|
|
rv64ui-p-srlw \
|
|
|
|
rv64ui-p-sub \
|
|
|
|
rv64ui-p-subw \
|
|
|
|
rv64ui-p-xor \
|
|
|
|
rv64ui-p-xori \
|
|
|
|
rv64uf-p-ldst \
|
|
|
|
rv64uf-p-move \
|
|
|
|
rv64uf-p-fsgnj \
|
|
|
|
rv64uf-p-fcmp \
|
|
|
|
rv64uf-p-fcvt \
|
|
|
|
rv64uf-p-fcvt_w \
|
2014-03-12 03:12:20 +01:00
|
|
|
rv64uf-p-fclass \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64uf-p-fadd \
|
|
|
|
rv64uf-p-fmin \
|
|
|
|
rv64uf-p-fmadd \
|
2015-06-26 08:17:35 +02:00
|
|
|
rv64uf-p-fdiv \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64uf-p-structural \
|
2014-01-22 01:20:24 +01:00
|
|
|
rv64si-p-csr \
|
2015-06-26 08:17:35 +02:00
|
|
|
rv64si-p-wfi \
|
|
|
|
rv64si-p-illegal \
|
|
|
|
rv64si-p-ma_fetch \
|
|
|
|
rv64si-p-ma_addr \
|
|
|
|
rv64si-p-scall \
|
|
|
|
rv64si-p-sbreak \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64ui-pm-lrsc \
|
2015-06-26 08:17:35 +02:00
|
|
|
rv64mi-p-csr \
|
|
|
|
rv64mi-p-mcsr \
|
|
|
|
rv64mi-p-wfi \
|
|
|
|
rv64mi-p-dirty \
|
|
|
|
rv64mi-p-illegal \
|
|
|
|
rv64mi-p-ma_addr \
|
|
|
|
rv64mi-p-ma_fetch \
|
|
|
|
rv64mi-pm-ipi \
|
|
|
|
rv64mi-p-sbreak \
|
|
|
|
rv64mi-p-scall \
|
|
|
|
rv64mi-p-timer \
|
|
|
|
|
|
|
|
asm_pt_tests = \
|
|
|
|
rv64ui-pt-add \
|
|
|
|
rv64ui-pt-addi \
|
|
|
|
rv64ui-pt-amoadd_d \
|
|
|
|
rv64ui-pt-amoadd_w \
|
|
|
|
rv64ui-pt-amoand_d \
|
|
|
|
rv64ui-pt-amoand_w \
|
|
|
|
rv64ui-pt-amoor_d \
|
|
|
|
rv64ui-pt-amoor_w \
|
|
|
|
rv64ui-pt-amoxor_d \
|
|
|
|
rv64ui-pt-amoxor_w \
|
|
|
|
rv64ui-pt-amoswap_d \
|
|
|
|
rv64ui-pt-amoswap_w \
|
|
|
|
rv64ui-pt-amomax_d \
|
|
|
|
rv64ui-pt-amomax_w \
|
|
|
|
rv64ui-pt-amomaxu_d \
|
|
|
|
rv64ui-pt-amomaxu_w \
|
|
|
|
rv64ui-pt-amomin_d \
|
|
|
|
rv64ui-pt-amomin_w \
|
|
|
|
rv64ui-pt-amominu_d \
|
|
|
|
rv64ui-pt-amominu_w \
|
|
|
|
rv64ui-pt-auipc \
|
|
|
|
rv64ui-pt-fence_i \
|
|
|
|
rv64ui-pt-sb \
|
|
|
|
rv64ui-pt-sd \
|
|
|
|
rv64ui-pt-sh \
|
|
|
|
rv64ui-pt-sw \
|
|
|
|
rv64ui-pt-addiw \
|
|
|
|
rv64ui-pt-addw \
|
|
|
|
rv64ui-pt-and \
|
|
|
|
rv64ui-pt-andi \
|
|
|
|
rv64ui-pt-beq \
|
|
|
|
rv64ui-pt-bge \
|
|
|
|
rv64ui-pt-bgeu \
|
|
|
|
rv64ui-pt-blt \
|
|
|
|
rv64ui-pt-bltu \
|
|
|
|
rv64ui-pt-bne \
|
|
|
|
rv64ui-pt-div \
|
|
|
|
rv64ui-pt-divu \
|
|
|
|
rv64ui-pt-divuw \
|
|
|
|
rv64ui-pt-divw \
|
|
|
|
rv64ui-pt-j \
|
|
|
|
rv64ui-pt-jal \
|
|
|
|
rv64ui-pt-jalr \
|
|
|
|
rv64ui-pt-lb \
|
|
|
|
rv64ui-pt-lbu \
|
|
|
|
rv64ui-pt-ld \
|
|
|
|
rv64ui-pt-lh \
|
|
|
|
rv64ui-pt-lhu \
|
|
|
|
rv64ui-pt-lui \
|
|
|
|
rv64ui-pt-lw \
|
|
|
|
rv64ui-pt-lwu \
|
|
|
|
rv64ui-pt-mul \
|
|
|
|
rv64ui-pt-mulh \
|
|
|
|
rv64ui-pt-mulhsu \
|
|
|
|
rv64ui-pt-mulhu \
|
|
|
|
rv64ui-pt-mulw \
|
|
|
|
rv64ui-pt-or \
|
|
|
|
rv64ui-pt-ori \
|
|
|
|
rv64ui-pt-rem \
|
|
|
|
rv64ui-pt-remu \
|
|
|
|
rv64ui-pt-remuw \
|
|
|
|
rv64ui-pt-remw \
|
|
|
|
rv64ui-pt-simple \
|
|
|
|
rv64ui-pt-sll \
|
|
|
|
rv64ui-pt-slli \
|
|
|
|
rv64ui-pt-slliw \
|
|
|
|
rv64ui-pt-sllw \
|
|
|
|
rv64ui-pt-slt \
|
|
|
|
rv64ui-pt-slti \
|
|
|
|
rv64ui-pt-sltiu \
|
|
|
|
rv64ui-pt-sltu \
|
|
|
|
rv64ui-pt-sra \
|
|
|
|
rv64ui-pt-srai \
|
|
|
|
rv64ui-pt-sraiw \
|
|
|
|
rv64ui-pt-sraw \
|
|
|
|
rv64ui-pt-srliw \
|
|
|
|
rv64ui-pt-srlw \
|
|
|
|
rv64ui-pt-sub \
|
|
|
|
rv64ui-pt-subw \
|
|
|
|
rv64ui-pt-xor \
|
|
|
|
rv64ui-pt-xori \
|
|
|
|
rv64uf-pt-ldst \
|
|
|
|
rv64uf-pt-move \
|
|
|
|
rv64uf-pt-fsgnj \
|
|
|
|
rv64uf-pt-fcmp \
|
|
|
|
rv64uf-pt-fcvt \
|
|
|
|
rv64uf-pt-fcvt_w \
|
|
|
|
rv64uf-pt-fclass \
|
|
|
|
rv64uf-pt-fadd \
|
|
|
|
rv64uf-pt-fmin \
|
|
|
|
rv64uf-pt-fmadd \
|
|
|
|
rv64uf-pt-fdiv \
|
|
|
|
rv64uf-pt-structural \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2013-04-24 10:59:14 +02:00
|
|
|
asm_v_tests = \
|
|
|
|
rv64ui-v-add \
|
|
|
|
rv64ui-v-addi \
|
|
|
|
rv64ui-v-amoadd_d \
|
|
|
|
rv64ui-v-amoadd_w \
|
|
|
|
rv64ui-v-amoand_d \
|
|
|
|
rv64ui-v-amoand_w \
|
|
|
|
rv64ui-v-amoor_d \
|
|
|
|
rv64ui-v-amoor_w \
|
2013-09-13 02:03:38 +02:00
|
|
|
rv64ui-v-amoxor_d \
|
|
|
|
rv64ui-v-amoxor_w \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64ui-v-amoswap_d \
|
|
|
|
rv64ui-v-amoswap_w \
|
|
|
|
rv64ui-v-amomax_d \
|
|
|
|
rv64ui-v-amomax_w \
|
|
|
|
rv64ui-v-amomaxu_d \
|
|
|
|
rv64ui-v-amomaxu_w \
|
|
|
|
rv64ui-v-amomin_d \
|
|
|
|
rv64ui-v-amomin_w \
|
|
|
|
rv64ui-v-amominu_d \
|
|
|
|
rv64ui-v-amominu_w \
|
|
|
|
rv64ui-v-auipc \
|
|
|
|
rv64ui-v-fence_i \
|
|
|
|
rv64ui-v-sb \
|
|
|
|
rv64ui-v-sd \
|
|
|
|
rv64ui-v-sh \
|
|
|
|
rv64ui-v-sw \
|
|
|
|
rv64ui-v-addiw \
|
|
|
|
rv64ui-v-addw \
|
|
|
|
rv64ui-v-and \
|
|
|
|
rv64ui-v-andi \
|
|
|
|
rv64ui-v-beq \
|
|
|
|
rv64ui-v-bge \
|
|
|
|
rv64ui-v-bgeu \
|
|
|
|
rv64ui-v-blt \
|
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rv64ui-v-bltu \
|
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rv64ui-v-bne \
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rv64ui-v-div \
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rv64ui-v-divu \
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rv64ui-v-divuw \
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rv64ui-v-divw \
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rv64ui-v-j \
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rv64ui-v-jal \
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rv64ui-v-jalr \
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rv64ui-v-lb \
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rv64ui-v-lbu \
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rv64ui-v-ld \
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rv64ui-v-lh \
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rv64ui-v-lhu \
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rv64ui-v-lui \
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rv64ui-v-lw \
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rv64ui-v-lwu \
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rv64ui-v-mul \
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rv64ui-v-mulh \
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rv64ui-v-mulhsu \
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rv64ui-v-mulhu \
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rv64ui-v-mulw \
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rv64ui-v-or \
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rv64ui-v-ori \
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rv64ui-v-rem \
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rv64ui-v-remu \
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rv64ui-v-remuw \
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rv64ui-v-remw \
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rv64ui-v-sll \
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rv64ui-v-slli \
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rv64ui-v-slliw \
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rv64ui-v-sllw \
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rv64ui-v-slt \
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rv64ui-v-slti \
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rv64ui-v-sltiu \
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rv64ui-v-sltu \
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rv64ui-v-sra \
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rv64ui-v-srai \
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rv64ui-v-sraiw \
|
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rv64ui-v-sraw \
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rv64ui-v-srliw \
|
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rv64ui-v-srlw \
|
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rv64ui-v-sub \
|
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rv64ui-v-subw \
|
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rv64ui-v-xor \
|
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rv64ui-v-xori \
|
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rv64uf-v-ldst \
|
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rv64uf-v-move \
|
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rv64uf-v-fsgnj \
|
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rv64uf-v-fcmp \
|
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rv64uf-v-fcvt \
|
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rv64uf-v-fcvt_w \
|
2014-03-12 03:12:20 +01:00
|
|
|
rv64uf-v-fclass \
|
2013-04-24 10:59:14 +02:00
|
|
|
rv64uf-v-fadd \
|
|
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|
rv64uf-v-fmin \
|
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rv64uf-v-fmadd \
|
2015-06-26 08:17:35 +02:00
|
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|
rv64uf-v-fdiv \
|
2013-04-24 10:59:14 +02:00
|
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|
rv64uf-v-structural \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Benchmark Tests
|
|
|
|
#--------------------------------------------------------------------
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
tests_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/benchmarks
|
2013-04-24 10:59:14 +02:00
|
|
|
bmarks = \
|
2012-10-02 04:30:11 +02:00
|
|
|
median.riscv \
|
|
|
|
multiply.riscv \
|
|
|
|
qsort.riscv \
|
|
|
|
towers.riscv \
|
|
|
|
vvadd.riscv \
|
2014-04-19 03:05:30 +02:00
|
|
|
mm.riscv \
|
2012-10-19 13:09:07 +02:00
|
|
|
dhrystone.riscv \
|
2012-11-05 01:43:02 +01:00
|
|
|
spmv.riscv \
|
2015-06-26 08:17:35 +02:00
|
|
|
mt-vvadd.riscv \
|
|
|
|
mt-matmul.riscv \
|
2013-09-13 02:03:38 +02:00
|
|
|
#vec-vvadd.riscv \
|
|
|
|
#vec-cmplxmult.riscv \
|
|
|
|
#vec-matmul.riscv \
|
2012-10-02 04:30:11 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Multi-threaded Benchmark Tests
|
|
|
|
#--------------------------------------------------------------------
|
2013-06-14 00:34:15 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
test_mt_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/mt
|
2013-06-14 00:34:15 +02:00
|
|
|
mt_bmarks = \
|
2015-06-26 08:17:35 +02:00
|
|
|
vvadd0.riscv \
|
|
|
|
vvadd1.riscv \
|
|
|
|
vvadd2.riscv \
|
|
|
|
vvadd3.riscv \
|
|
|
|
vvadd4.riscv \
|
|
|
|
ad_matmul.riscv \
|
|
|
|
ae_matmul.riscv \
|
|
|
|
af_matmul.riscv \
|
|
|
|
ag_matmul.riscv \
|
|
|
|
ai_matmul.riscv \
|
|
|
|
ak_matmul.riscv \
|
|
|
|
al_matmul.riscv \
|
|
|
|
am_matmul.riscv \
|
|
|
|
an_matmul.riscv \
|
|
|
|
ap_matmul.riscv \
|
|
|
|
aq_matmul.riscv \
|
|
|
|
ar_matmul.riscv \
|
|
|
|
at_matmul.riscv \
|
|
|
|
av_matmul.riscv \
|
|
|
|
ay_matmul.riscv \
|
|
|
|
az_matmul.riscv \
|
|
|
|
bb_matmul.riscv \
|
|
|
|
bc_matmul.riscv \
|
|
|
|
bf_matmul.riscv \
|
|
|
|
bh_matmul.riscv \
|
|
|
|
bj_matmul.riscv \
|
|
|
|
bk_matmul.riscv \
|
|
|
|
bm_matmul.riscv \
|
|
|
|
bo_matmul.riscv \
|
|
|
|
br_matmul.riscv \
|
|
|
|
bs_matmul.riscv \
|
|
|
|
ce_matmul.riscv \
|
|
|
|
cf_matmul.riscv \
|
|
|
|
cg_matmul.riscv \
|
|
|
|
ci_matmul.riscv \
|
|
|
|
ck_matmul.riscv \
|
|
|
|
cl_matmul.riscv \
|
|
|
|
cm_matmul.riscv \
|
|
|
|
cs_matmul.riscv \
|
|
|
|
cv_matmul.riscv \
|
|
|
|
cy_matmul.riscv \
|
|
|
|
dc_matmul.riscv \
|
|
|
|
df_matmul.riscv \
|
|
|
|
dm_matmul.riscv \
|
|
|
|
do_matmul.riscv \
|
|
|
|
dr_matmul.riscv \
|
|
|
|
ds_matmul.riscv \
|
|
|
|
du_matmul.riscv \
|
|
|
|
dv_matmul.riscv \
|
2013-09-15 13:25:53 +02:00
|
|
|
|
2014-09-01 05:26:55 +02:00
|
|
|
#--------------------------------------------------------------------
|
|
|
|
# Build Tests
|
|
|
|
#--------------------------------------------------------------------
|
|
|
|
|
|
|
|
%.hex:
|
|
|
|
$(MAKE) -C $(dir $@) $(notdir $@)
|
|
|
|
|
|
|
|
%.riscv.hex: %
|
|
|
|
$(MAKE) -C $(dir $@) $(notdir $@)
|
|
|
|
|
2015-06-26 08:17:35 +02:00
|
|
|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests))): $(output_dir)/%.hex: $(tests_isa_dir)/%.hex
|
2014-09-01 05:26:55 +02:00
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
|
|
|
|
|
|
|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(bmarks))): $(output_dir)/%.hex: $(tests_bmark_dir)/%.hex
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
|
|
|
|
|
|
|
$(addprefix $(output_dir)/, $(addsuffix .hex, $(mt_bmarks))): $(output_dir)/%.hex: $(test_mt_bmark_dir)/%.hex
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
2015-06-26 08:17:35 +02:00
|
|
|
|
|
|
|
$(addprefix $(output_dir)/, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests)): $(output_dir)/%: $(tests_isa_dir)/%
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
|
|
|
|
|
|
|
$(addprefix $(output_dir)/, $(bmarks)): $(output_dir)/%: $(tests_bmark_dir)/%
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|
|
|
|
|
|
|
|
$(addprefix $(output_dir)/, $(mt_bmarks)): $(output_dir)/%: $(test_mt_bmark_dir)/%
|
|
|
|
mkdir -p $(output_dir)
|
|
|
|
ln -fs $< $@
|