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fpga-shells/src/main/scala/ip/xilinx
2018-02-08 07:21:45 -08:00
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ibufds_gte2 Initial commit for fpga-shells 2017-08-16 11:23:45 -07:00
vc707axi_to_pcie_x1 vc707 axi: move addresses to line up with ChipLink 2018-02-08 07:21:44 -08:00
vc707mig Support both 4G and 1GB DIMM configuration for VC707 2017-09-08 15:52:53 -07:00
Unisim.scala Xilinx unisim typo 2018-02-08 07:21:44 -08:00
Xilinx.scala vc707: setup 100MHz PLL 2018-02-08 07:21:45 -08:00