Henry Styles
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9f75e6eb59
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Support both 4G and 1GB DIMM configuration for VC707
Generate IP TCL and MIG projects from the Chisel blackboxes
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2017-09-08 15:52:53 -07:00 |
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Megan Wachs
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13671f906d
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synchronizers: Use new primitives
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2017-09-06 11:00:25 -07:00 |
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Shreesha Srinath
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2389e6e957
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Fix the package path for xilinx vc707mig
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2017-08-18 14:47:03 -07:00 |
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Shreesha Srinath
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c58e79f155
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vc707: Updates to the constraints and shell
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2017-08-17 18:51:01 -07:00 |
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Shreesha Srinath
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ab8cf0775f
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Initial commit for fpga-shells
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2017-08-16 11:23:45 -07:00 |
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