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Commit Graph

5 Commits

Author SHA1 Message Date
Henry Styles
9f75e6eb59 Support both 4G and 1GB DIMM configuration for VC707
Generate IP TCL and MIG projects from the Chisel blackboxes
2017-09-08 15:52:53 -07:00
Megan Wachs
13671f906d synchronizers: Use new primitives 2017-09-06 11:00:25 -07:00
Shreesha Srinath
2389e6e957 Fix the package path for xilinx vc707mig 2017-08-18 14:47:03 -07:00
Shreesha Srinath
c58e79f155 vc707: Updates to the constraints and shell 2017-08-17 18:51:01 -07:00
Shreesha Srinath
ab8cf0775f Initial commit for fpga-shells 2017-08-16 11:23:45 -07:00