Freedom FPGA mappings (https://github.com/sifive/fpga-shells)
9f75e6eb59
Generate IP TCL and MIG projects from the Chisel blackboxes |
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src/main/scala | ||
xilinx | ||
.gitignore |
9f75e6eb59
Generate IP TCL and MIG projects from the Chisel blackboxes |
||
---|---|---|
src/main/scala | ||
xilinx | ||
.gitignore |