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Commit Graph

9 Commits

Author SHA1 Message Date
Wesley W. Terpstra
0ca609d324 vc707axi: track rocketchip API changes (#16) 2017-06-02 15:56:18 -07:00
Wesley W. Terpstra
c4c158963c vc707mig: use an external ibuf
This makes it possible to also drive a PLL of our own from the crystal.
2017-05-12 23:07:10 -07:00
Wesley W. Terpstra
178ac84b59 xilinxvc707pciex1: better wrapper for AXI4-Lite control node (#12) 2017-05-08 01:08:37 -07:00
Wesley W. Terpstra
a24fa9b444 axi4: switch to new pipelined converters 2017-04-26 13:10:50 -07:00
Henry Styles
b882d6da93 Use _chisel3 analog for MIG inout 2017-04-25 10:15:00 -07:00
Wesley W. Terpstra
062203ae18 xilinx pcie: add the high PCIe address bits (physical path)
The format is taken from here:
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
2017-03-02 21:22:41 -08:00
Wesley W. Terpstra
46aa6b0ac4 devices: include DTS meta-data 2017-03-02 20:39:30 -08:00
Wesley W. Terpstra
5b6760394d xilinx ip: adjust to new diplomacy API 2017-01-30 11:33:30 -08:00
SiFive
7916ef5249 Initial commit. 2016-11-29 04:08:44 -08:00