  Wesley W. TerpstraandGitHub
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0ca609d324
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vc707axi: track rocketchip API changes (#16)
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2017-06-02 15:56:18 -07:00 |
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Wesley W. Terpstra
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c4c158963c
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vc707mig: use an external ibuf
This makes it possible to also drive a PLL of our own from the crystal.
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2017-05-12 23:07:10 -07:00 |
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Wesley W. TerpstraandGitHub
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178ac84b59
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xilinxvc707pciex1: better wrapper for AXI4-Lite control node (#12)
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2017-05-08 01:08:37 -07:00 |
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Wesley W. Terpstra
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a24fa9b444
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axi4: switch to new pipelined converters
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2017-04-26 13:10:50 -07:00 |
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 Henry Styles
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b882d6da93
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Use _chisel3 analog for MIG inout
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2017-04-25 10:15:00 -07:00 |
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Wesley W. Terpstra
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062203ae18
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xilinx pcie: add the high PCIe address bits (physical path)
The format is taken from here:
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
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2017-03-02 21:22:41 -08:00 |
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 Wesley W. TerpstraandHenry Cook
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46aa6b0ac4
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devices: include DTS meta-data
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2017-03-02 20:39:30 -08:00 |
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Wesley W. Terpstra
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5b6760394d
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xilinx ip: adjust to new diplomacy API
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2017-01-30 11:33:30 -08:00 |
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 toyandtoy
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7916ef5249
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Initial commit.
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2016-11-29 04:08:44 -08:00 |
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